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All publications
2010
Faults Coverage Improvement based on Fault Simulation and Partial Duplication, Borecký,J., Kohlík,M., Kubátová,H., Kubalík, P., Proceedings of the 13th Euromicro Conference on Digital System Design, Lille, 2010, pp.(380-386)
2009
Reliable Railway Station System based on Regular Structure implemented in FPGA, Borecký,J., Kubalík,P., Kubátová,H, Proc. of 12th EUROMICRO Conference on Digital System Design, Patras, 2009, pp.(348-354).
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2008
Dependable design technique for system-on-chip (Článek) 2008, KUBALÍK P., KUBÁTOVÁ H. Journal of Systems Architecture. 2008, vol. 2008, no. 54, p. 452-464. ISSN 1383-7621.
An Efficient Multiple-Parity Generator Design for On-Line Testing on FPGA (Stať ve sborníku) 2008, FIŠER P., KUBALÍK P., KUBÁTOVÁ H. In Proceedings of 11th Euromicro Conference on Digital System Design. Los Alamitos: IEEE Computer Society, 2008, p. 96-99. ISBN 978-0-7695-3277-6.
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Experimental SEU Impact on Digital Design Implemented in FPGAs (Stať ve sborníku) 2008, KVASNIČKA J., KUBALÍK P., KUBÁTOVÁ H. In Proceedings of 11th Euromicro Conference on Digital System Design. Los Alamitos: IEEE Computer Society, 2008, p. 100-103. ISBN 978-0-7695-3277-6.
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Experimental emulation of FPGA bitstream faults in combinatorial circuits (Stať v elektronickém sborníku) 2008, KVASNIČKA J., KUBALÍK P., KUBÁTOVÁ H. In Proceedings of CSE 2008 International Scientific Conference on Computer Science and Engineering [CD-ROM]. Košice: Department of Computers and Informatics of FEI, Technical University Košice, 2008, vol. 1, p. 328-335. ISBN 978-80-8086-092-9.
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2007
Fault Injection and Simulation for Fault Tolerant Reconfigurable Duplex System (Stať ve sborníku) 2007, KUBALÍK P., KVASNIČKA J., KUBÁTOVÁ H. In Design and Diagnostics of Electronic Circuits and Systems. Los Alamitos: IEEE Computer Society, 2007, p. 357-360. ISBN 1-4244-1161-0.
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An FPGA based fault emulator (Stať ve sborníku) 2007, KVASNIČKA J., KUBALÍK P., KUBÁTOVÁ H. In Proceedings of the Work in Progress Session held in connection with the EUROMICRO Conferences SEAA and DSD 2007. Linz: Johannes Kepler University, 2007, p. 42-43. ISBN 978-3-902457-16-5.
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Design of Self Checking Circuits Based on FPGAs (Dissertation thesis (Ph.D.)) 2007, KUBALÍK P. [PhD Thesis]. Prague: CTU, Faculty of Electrical Engineering, Department of Computer Science and Engineering, 2007. 71 p.
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2006
Fault Tolerant System Design Method Based on Self-Checking Circuits (Stať ve sborníku) 2006, KUBALÍK P., FIŠER P., KUBÁTOVÁ H. In Proceedings IOLTS 2006 12th IEEE International On-Line Testing Symposium, IOLTS2006. Los Alamitos: IEEE Computer Society, 2006, p. 185-186. ISBN 0-7695-2620-9.
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Citation: Ambegoda, A.L.A.T.D.; De Silva, W.T.S.; Hemachandra, K.T.; Samarasinghe, T.N.; Samarasinghe, A.T.L.K.; , “Centralized Traffic Controlling System for Sri Lanka Railways,” Information and Automation for Sustainability, 2008. ICIAFS 2008. 4th International Conference on , vol., no., pp.145-149, 12-14 Dec. 2008
Citation: Straka, M.; Kotasek, Z.; Winter, J.; , “Digital Systems Architectures Based on On-line Checkers,” Digital System Design Architectures, Methods and Tools, 2008. DSD '08. 11th EUROMICRO Conference on , vol., no., pp.81-87, 3-5 Sept. 2008
Citation: Straka, M.; Kotasek, Z.; , “High Availability Fault Tolerant Architectures Implemented into FPGAs,” Digital System Design, Architectures, Methods and Tools, 2009. DSD '09. 12th Euromicro Conference on , vol., no., pp.108-115, 27-29 Aug. 2009
Dependable Design for FPGA based on Duplex System and Reconfiguration (Stať ve sborníku) 2006, KUBALÍK P., DOBIÁŠ R., KUBÁTOVÁ H. In Proceedings of 9th Euromicro Conference on Digital System Design, DSD2006. Los Alamitos: IEEE Computer Society, 2006, p. 139-145. ISBN 0-7695-2609-8.
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Citation: Silva, R.S.F.; Hesser, J.; Männer, R.; , “Contract Specification for Hardware Interoperability Testing and Fault Analysis,” Reliability, IEEE Transactions on , vol.60, no.1, pp.351-362, March 2011
Citation: Straka, M.; Kotasek, Z.; , “High Availability Fault Tolerant Architectures Implemented into FPGAs,” Digital System Design, Architectures, Methods and Tools, 2009. DSD '09. 12th Euromicro Conference on , vol., no., pp.108-115, 27-29 Aug. 2009.
Dependability Computation for Fault Tolerant Reconfigurable Duplex System (Stať ve sborníku) 2006, KUBALÍK P., DOBIÁŠ R., KUBÁTOVÁ H. In Proceedings of the 2006 IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, DDECS2006. Praha: CTU Publishing House, 2006, vol. 1, p. 100-102. ISBN 1-4244-0184-4.
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Citation: Mi Zhou, Lihong Shang, and Yu Hu. 2009. Reliability Optimization of Reconfigurable FPGA Based on Second-Order Approximation Domain-Partition. In Proceedings of the 2009 International Conference on Embedded Software and Systems (ICESS '09). IEEE Computer Society, Washington, DC, USA, 511-516
Citation: Mi Zhou, Lihong Shang, Yu Hu, “Reliability Optimization of Reconfigurable Computing-Based Fault-Tolerant System,” High Performance Computing and Communications, pp. 369-375, 11th IEEE International Conference on High Performance Computing and Communications, 2009
Citation: Shang, Lihong; Zhou, Mi; Hu, Yu; , “A fault-tolerant system-on-programmable-chip based on domain-partition and blind reconfiguration,” Adaptive Hardware and Systems (AHS), 2010 NASA/ESA Conference on , vol., no., pp.297-303, 15-18 June 2010
Citation: Straka, M.; Kotasek, Z.; , “High Availability Fault Tolerant Architectures Implemented into FPGAs,” Digital System Design, Architectures, Methods and Tools, 2009. DSD '09. 12th Euromicro Conference on , vol., no., pp.108-115, 27-29 Aug. 2009.
Design Methodology for High Reliable System (Stať ve sborníku) 2006, KUBALÍK P., KUBÁTOVÁ H. In Proceedings of the Seventh International Scientific Conference on Electronic Computers and Informatics ECI 2006. Košice: Technická univerzita v Košiciach, 2006, vol. 1, p. 274-279. ISBN 80-8073-598-0.
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Output Grouping Method Based on a Similarity of Boolean Functions (Stať ve sborníku) 2006, FIŠER P., KUBALÍK P., KUBÁTOVÁ H. In Proceedings of the 7th International Workshop on Boolean Problems. Freiberg: Technische Universität Bergakademie, 2006, p. 107-113. ISBN 3-86012-287-8.
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Proceedings of the 2006 IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems (Elektronický sborník (na CD-ROM nebo na webu)) 2006, SONZA REORDA M. S. R., STRAUBE B. S., KOTÁSEK Z. K., UBAR R. U., NOVÁK O., KUBÁTOVÁ H., KUBALÍK P., BUČEK J. Praha: Czech Technical University in Prague, 2006. 305 p. ISBN 1-4244-0185-2.
2005
Design of Self-Testing Circuits Using Parity Codes (Paper in Electronic Proceedings (CD-ROM or web)) 2005, KUBALÍK P., KUBÁTOVÁ H. In Proceedings of Workshop 2005 [CD-ROM]. Prague: CTU, 2005, p. 214-215. ISBN 80-01-03201-9. (in Czech).
Reconfigurable Duplex System Increasing Fault Tolerance for Circuits Based on FPGAs (Paper in Conference Proceedings) 2005, KUBALÍK P., KUBÁTOVÁ H. In Proceedings of the Work in Progress Session. Linz: Johannes Kepler University, 2005, p. 13-14. ISBN 3-902457-09-0.
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Highly Reliable Design Based on TSC Circuits (Paper in Conference Proceedings) 2005, KUBALÍK P., KUBÁTOVÁ H. In Počítačové architektury & diagnostika. Prague: CTU, Faculty of Electrical Engineering, Department of Computer Science and Engineering, 2005, vol. 1, p. 101-106. ISBN 80-01-03298-1.
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Dependability Computations for Fault-Tolerant System Based on FPGA (Paper in Conference Proceedings) 2005, DOBIÁŠ R., KUBALÍK P., KUBÁTOVÁ H. In Proceedings of the 12th International Conferrence on Electronics, Circuits and Systems. Monterey: IEEE Circuits and Systems Society, 2005, vol. 1, p. 377-380. ISBN 9973-61-100-4.
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Fault Classification for Self-checking Circuits Implemented in FPGA (Paper in Conference Proceedings) 2005, KAFKA L., KUBALÍK P., KUBÁTOVÁ H., NOVÁK O. In Proceedings of IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop. Sopron: University of Western Hungary, 2005, p. 228-231. ISBN 963 9364 48 7.
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Parity Codes Used for On-line Testing in FPGA (Článek) 2005, KUBALÍK P., KUBÁTOVÁ H. Acta Polytechnica. 2005, vol. 45, no. 6, p. 53-59. ISSN 1210-2709.
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2004
2003
FPGA Implementation of USB 1.1 Device Core (Paper in Conference Proceedings) 2003, KUBALÍK P., BUČEK J. In Poster 2003. Prague: CTU, Faculty of Electrical Engineering, 2003, p. IC22.
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FPGA Implementation of USB 1.1 Device Core (Paper in Electronic Proceedings (CD-ROM or web)) 2003, KUBALÍK P., BUČEK J. In Proceedings of Workshop 2003 (online) [CD-ROM]. Prague: CTU, 2003, vol. A, p. 304-305. ISBN 80-01-02708-2.
Design of Self Checking Circuits Based on FPGA (Paper in Conference Proceedings) 2003, KUBALÍK P., KUBÁTOVÁ H. In Proceedings of the 15th International Conference on Microelectronics. Cairo: Cairo University, 2003, p. 378-381. ISBN 977-05-2010-1.
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Citation: Cristiana Bolchini and Antonio Miele. 2008. Design Space Exploration for the Design of Reliable SRAM-Based FPGA Systems. In Proceedings of the 2008 IEEE International Symposium on Defect and Fault Tolerance of VLSI Systems (DFT '08). IEEE Computer Society, Washington, DC, USA, 332-340.
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