Research Links

Conferences
Journals
My Projects Available to Publics

Logic synthesis

MinCirc - Optimum circuits generator
BOOM - Two-level Boolean minimizer
TT-Min - Another two-level Boolean minimizer
BoolTool - The Boolean function manipulation tool
Resynth - Circuit resynthesis by parts
XorDecomp - A XOR decomposition tool
ABC Tcl - Tcl/Tk support for ABC
BDS - BDD-based decomposition tool, new version maintained by DDD

Diagnostics, testing

SAT-Compress - SAT-based ATPG tool
Fault classifier - classifies faults in circuits inplemented in ASIC or FPGA
ColMatch - A BIST design tool

Benchmarks

A Collection of Digital Design Benchmarks (ISCAS, ITC, MCNC, IWLS, LGSynth, ...)
Random Circuits Generators - Parametrized generators of random PLA and KISS files
BOOM Benchmarks - A set of artificial BOOM benchmarks
Papers, Publications
Other
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