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====== Software to download ======

^  Year  ^  Platform  ^  Name of application  ^  Description  ^  Download  ^
^  2009  |  Xilinx ML506 FPGA board  |  Serial ATA core with cryptography support  |  This work deals with design and implementation of a Serial ATA core with cryptography support in HDL language. The core is implemented and tested on Xilinx Virtex-5 FXT FPGA, Xilinx ML-507 development board. The system is controlled by using Ethernet frames. Cryptographic AES-128 core is placed between Ethernet and SATA core, making possible to crypt stream of transferred data. The design uses Xilinx Serial ATA PHY and Xiling TEMAC hard cores. First part of this work deals with analysis of Serial ATA protocol and cryptography as well, next part deals with overall system design, the last one describes system implementation and testing.  |  {{:software:sata_to_eth_core_top.zip|zip}}   |
^  2009  |  SVM Evaluation FPGA Board  |  Application software for control system device allowing Ethernet packet preprocessing and routing   |  Final implementation of control system was created. Implementation is based on VHDL source code. System enable route packet between four interfaces. These interfaces are: Ethernet core, external memory core, processor and radio interface. System finally operates at 125 MHz clock speed.  |  {{:software:ethernet_packet_router.zip|zip}}  |
^  2011  |  Xilinx ML401 FPGA board  |  High speed ethernet core   |  This software realizes the fast ethernet core, which operates at 10, 100 and 1000 Mbps. The core is written in the VHDL language and the main property is the low latency, minimal space requirements and simplicity. Further usage of this score is in school projects instead of using commercial one (e. g. TEMAC). Because of previous reasons, there are implemented a subset of the IEEE 802.3 standard, which provides a functionality at 10, 100 and 1000 Mbps speeds with full duplex.  |  {{:software:high_speed_eth_core.zip|zip}}  |
^  2010  |  PC  |  Configurable generator of VHDL structure   |  This application defines templates of VHDL structures, which allows us easily generate most used VHDL structures, mainly counters and automats. Application can also work with VHDL testbench templates from which can be created VHDL testbenches of existing projects.  |  {{:software:vhdl_sgen221.zip|zip}}  |
^  2010  |  PC  |  Linux and Cisco virtual network simulator   |  This application is the simulator composed of cisco and linux based routers. Simulator allows configuration of routers via Cisco IOS and Linux command line. Simulator implements commands for configuring interfaces, static routing, dynamic and static network address translation. This system also offers verification of current configuration via ping and traceroute commands. Entire network settings are loaded from a configuration file and there is also possibility to save current configuration to a given file. User testing is integral part of a thesis.  |  {{:software:simulator_linux.zip|zip}}  |
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