publication:public_list
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publication:public_list [2017/01/20 12:42] xkubalik [2006] |
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| * **Fault Models Usability Study for On-line Tested FPGA**, Borecký,J., Kohlík,M., Kubátová,H., Kubalík, P., Proceedings of the 13th Euromicro Conference on Digital System Design, Oulu, 2011, pp.(287-290) {{:publication:dsd2011.pdf|pdf}} | * **Fault Models Usability Study for On-line Tested FPGA**, Borecký,J., Kohlík,M., Kubátová,H., Kubalík, P., Proceedings of the 13th Euromicro Conference on Digital System Design, Oulu, 2011, pp.(287-290) {{:publication:dsd2011.pdf|pdf}} | ||
| * //__Citation__: **"A New Efficient and Reliable Dynamically Reconfigurable Network-on-Chip"**, Cédric Killian, Camel Tanougast, Fabrice Monteiro, and Abbas Dandache, Journal of Electrical and Computer Engineering, vol. 2012, Article ID 843239, 16 pages, 2012. doi:10.1155/2012/843239.// | * //__Citation__: **"A New Efficient and Reliable Dynamically Reconfigurable Network-on-Chip"**, Cédric Killian, Camel Tanougast, Fabrice Monteiro, and Abbas Dandache, Journal of Electrical and Computer Engineering, vol. 2012, Article ID 843239, 16 pages, 2012. doi:10.1155/2012/843239.// | ||
| + | * //__Citation__: **"Analytical Fault Tolerance Assessment and Metrics for TSV-Based 3D Network-on-Chip"**, Eghbal, A.; Yaghini, P.M.; Bagherzadeh, N.; Khayambashi, M., Computers, IEEE Transactions on, vol. 64, pp. 3591 - 3604, 2015.// | ||
| + | * //__Citation__: **"DAO: Dual module redundancy with AND/OR logic voter for FPGA hardening"**, Meisong Zheng; Zilong Wang; Lijian Li, Reliability Systems Engineering (ICRSE), 2015 First International Conference on, pp. 1 - 5, 2015.// | ||
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publication/public_list.txt · Last modified: 2017/10/10 12:14 by xkubalik
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