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publication:public_list [2014/03/06 13:52]
xkubalik [2009]
publication:public_list [2016/03/10 09:18]
xkubalik [2015]
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 ====== All publications ====== ====== All publications ======
 +
 +==== 2015 ====
 +
 +  * **Rychlé bezztrátové kompresní algoritmy**,​ Bartík,​ M., S. Ubik, and P. Kubalík. Rychlé bezztrátové kompresní algoritmy, Sborník příspěvků PAD 2015. Počítačové architektury a diagnostika 2015, Zlín, 2015-09-02/​2015-09-04. Zlín: Universita Tomáše Bati ve Zlíně, 2015, pp. 31-36. ISBN 978-80-7454-522-1.
 +==== 2014 ====
 +
 +  * **System Design of an FPGA Linear Solver**, Buček, J., Kubalík, P., Zahradnický,​ T., Lorencz, Proceedings of the Work in Progress Session held in connection with the 40th EUROMICRO Conference on Software Engineering and Advanced Applications and the 17th EUROMICRO Conference on Digital System Design, DSD2014, Verona, 2014-08-27/​2014-08-29. Linz: Johannes Kepler University, 2014, ISBN 978-3-902457-40-0.
 +  * **System on Chip Design of a Linear System Solver**, Buček, J., Kubalík, P., Zahradnický,​ T., Lorencz, R.,. In: 2014 International Symposium on System-on-Chip Proceedings,​ SoC 2014, Tampere, 2014-10-28/​2014-10-29. Piscataway: IEEE, 2014, ISBN 9781479968909.
 +  * **An ASIC Linear Congruence Solver Synthesized with Three Cell Libraries**,​ Buček, J., Kubalík, P., Zahradnický,​ T., Lorencz, R., Proceedings of the 21st IEEE International Conference on Electronics Circuits and Systems, ICECS 2014, Marseille, 2014-12-07/​2014-12-10. Monterey: IEEE Circuits and Systems Society, 2014, pp. 706-709. ISBN 978-1-4799-4242-8.
  
 ==== 2013 ==== ==== 2013 ====
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   * **Fault-tolerant and fail-safe design based on reconfiguration**,​ Kubátová,​H.,​ Kubalík, P., Chapter in book: Design and Test Technology for Dependable Systems-on-Chip, ​ 2011, pp.(175-194)   * **Fault-tolerant and fail-safe design based on reconfiguration**,​ Kubátová,​H.,​ Kubalík, P., Chapter in book: Design and Test Technology for Dependable Systems-on-Chip, ​ 2011, pp.(175-194)
   * **Fault Models Usability Study for On-line Tested FPGA**, Borecký,​J.,​ Kohlík,M., Kubátová,​H.,​ Kubalík, P., Proceedings of the 13th Euromicro Conference on Digital System Design, Oulu, 2011, pp.(287-290) {{:​publication:​dsd2011.pdf|pdf}}   * **Fault Models Usability Study for On-line Tested FPGA**, Borecký,​J.,​ Kohlík,M., Kubátová,​H.,​ Kubalík, P., Proceedings of the 13th Euromicro Conference on Digital System Design, Oulu, 2011, pp.(287-290) {{:​publication:​dsd2011.pdf|pdf}}
 +    * //​__Citation__:​ **"A New Efficient and Reliable Dynamically Reconfigurable Network-on-Chip"​**,​ Cédric Killian, Camel Tanougast, Fabrice Monteiro, and Abbas Dandache, Journal of Electrical and Computer Engineering,​ vol. 2012, Article ID 843239, 16 pages, 2012. doi:​10.1155/​2012/​843239.//​
 ==== 2010 ==== ==== 2010 ====
  
publication/public_list.txt · Last modified: 2017/10/10 12:14 by xkubalik