publication:public_list
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publication:public_list [2014/03/06 13:25] xkubalik [2006] |
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| ====== All publications ====== | ====== All publications ====== | ||
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| + | ==== 2015 ==== | ||
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| + | * **LZ4 Compression Algorithm on FPGA**, BARTÍK, M., S. UBIK, and P. KUBALÍK., 21st IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2015, Cairo, 2015-12-06/2015-12-09. New York: Institute of Electrical and Electronics Engineers, 2015, vol. 1, pp. 179-182. ISBN 978-1-4799-2451-6. | ||
| + | * **Rychlé bezztrátové kompresní algoritmy**, Bartík, M., S. Ubik, and P. Kubalík, Sborník příspěvků PAD 2015. Počítačové architektury a diagnostika 2015, Zlín, 2015-09-02/2015-09-04. Zlín: Universita Tomáše Bati ve Zlíně, 2015, pp. 31-36. ISBN 978-80-7454-522-1. | ||
| + | ==== 2014 ==== | ||
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| + | * **System Design of an FPGA Linear Solver**, Buček, J., Kubalík, P., Zahradnický, T., Lorencz, Proceedings of the Work in Progress Session held in connection with the 40th EUROMICRO Conference on Software Engineering and Advanced Applications and the 17th EUROMICRO Conference on Digital System Design, DSD2014, Verona, 2014-08-27/2014-08-29. Linz: Johannes Kepler University, 2014, ISBN 978-3-902457-40-0. | ||
| + | * **System on Chip Design of a Linear System Solver**, Buček, J., Kubalík, P., Zahradnický, T., Lorencz, R.,. In: 2014 International Symposium on System-on-Chip Proceedings, SoC 2014, Tampere, 2014-10-28/2014-10-29. Piscataway: IEEE, 2014, ISBN 9781479968909. | ||
| + | * **An ASIC Linear Congruence Solver Synthesized with Three Cell Libraries**, Buček, J., Kubalík, P., Zahradnický, T., Lorencz, R., Proceedings of the 21st IEEE International Conference on Electronics Circuits and Systems, ICECS 2014, Marseille, 2014-12-07/2014-12-10. Monterey: IEEE Circuits and Systems Society, 2014, pp. 706-709. ISBN 978-1-4799-4242-8. | ||
| ==== 2013 ==== | ==== 2013 ==== | ||
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| * **Fault-tolerant and fail-safe design based on reconfiguration**, Kubátová,H., Kubalík, P., Chapter in book: Design and Test Technology for Dependable Systems-on-Chip, 2011, pp.(175-194) | * **Fault-tolerant and fail-safe design based on reconfiguration**, Kubátová,H., Kubalík, P., Chapter in book: Design and Test Technology for Dependable Systems-on-Chip, 2011, pp.(175-194) | ||
| * **Fault Models Usability Study for On-line Tested FPGA**, Borecký,J., Kohlík,M., Kubátová,H., Kubalík, P., Proceedings of the 13th Euromicro Conference on Digital System Design, Oulu, 2011, pp.(287-290) {{:publication:dsd2011.pdf|pdf}} | * **Fault Models Usability Study for On-line Tested FPGA**, Borecký,J., Kohlík,M., Kubátová,H., Kubalík, P., Proceedings of the 13th Euromicro Conference on Digital System Design, Oulu, 2011, pp.(287-290) {{:publication:dsd2011.pdf|pdf}} | ||
| + | * //__Citation__: **"A New Efficient and Reliable Dynamically Reconfigurable Network-on-Chip"**, Cédric Killian, Camel Tanougast, Fabrice Monteiro, and Abbas Dandache, Journal of Electrical and Computer Engineering, vol. 2012, Article ID 843239, 16 pages, 2012. doi:10.1155/2012/843239.// | ||
| ==== 2010 ==== | ==== 2010 ==== | ||
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| * **Reliable Railway Station System based on Regular Structure implemented in FPGA**, Borecký,J., Kubalík,P., Kubátová,H, Proc. of 12th EUROMICRO Conference on Digital System Design, Patras, 2009, pp.(348-354). {{:publication:dsd2009.pdf|pdf}} | * **Reliable Railway Station System based on Regular Structure implemented in FPGA**, Borecký,J., Kubalík,P., Kubátová,H, Proc. of 12th EUROMICRO Conference on Digital System Design, Patras, 2009, pp.(348-354). {{:publication:dsd2009.pdf|pdf}} | ||
| - | * //__Citation__: Cinzia Bernardeschi, Luca Cassano, Andrea Domenici,Giancarlo Gennaro, Mario Pasquariello; **"Simulated Injection of Radiation-Induced Logic Faults in FPGAs"** , The Third International Conference on Advances in System Testing and Validation Lifecycle, pp.84-89, VALID 2011// | + | * //__Citation__: **"Simulated Injection of Radiation-Induced Logic Faults in FPGAs"**, Cinzia Bernardeschi, Luca Cassano, Andrea Domenici,Giancarlo Gennaro, Mario Pasquariello;, The Third International Conference on Advances in System Testing and Validation Lifecycle, pp.84-89, VALID 2011// |
| - | * //__Citation__: Cinzia Bernardeschi, Luca Cassano, Mario G.C.A. Cimino, Andrea Domenici, **"GABES: A genetic algorithm based environment for SEU testing in SRAM-FPGAs"**, Journal of Systems Architecture, Volume 59, Issue 10, Part D, November 2013, Pages 1243-1254, ISSN 1383-7621// | + | * //__Citation__: **"GABES: A genetic algorithm based environment for SEU testing in SRAM-FPGAs"**, Cinzia Bernardeschi, Luca Cassano, Mario G.C.A. Cimino, Andrea Domenici, Journal of Systems Architecture, Volume 59, Issue 10, Part D, November 2013, Pages 1243-1254, ISSN 1383-7621// |
| - | * //__Citation__: Trifonov, V.,: **"Safety Automata Network for Interlocking System"**, Mechanics Transport Communications, Academic journal, 2011.// | + | * //__Citation__: **"Safety Automata Network for Interlocking System"**, Trifonov, V.,: Mechanics Transport Communications, Academic journal, 2011.// |
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| * **Dependable design technique for system-on-chip** (Článek) 2008, KUBALÍK P., KUBÁTOVÁ H. Journal of Systems Architecture. 2008, vol. 2008, no. 54, p. 452-464. ISSN 1383-7621. | * **Dependable design technique for system-on-chip** (Článek) 2008, KUBALÍK P., KUBÁTOVÁ H. Journal of Systems Architecture. 2008, vol. 2008, no. 54, p. 452-464. ISSN 1383-7621. | ||
| - | * //__Citation__: Sergio Cuenca-Asensia, Antonio Martínez-Álvareza, Felipe Restrepo-Callea, Francisco R. Palomob, Hipólito Guzmán-Mirandab, Miguel A. Aguirreb; "Soft core based embedded systems in critical aerospace applications" Journal of Systems Architecture, vol.57, issue 10, no.0, pp.886-895, November 2011// | + | * //__Citation__: **"Soft core based embedded systems in critical aerospace applications"**, Sergio Cuenca-Asensia, Antonio Martínez-Álvareza, Felipe Restrepo-Callea, Francisco R. Palomob, Hipólito Guzmán-Mirandab, Miguel A. Aguirreb;, Journal of Systems Architecture, vol.57, issue 10, no.0, pp.886-895, November 2011// |
| - | * //__Citation__: Cristiana Bolchini, Antonio Miele, Chiara Sandionigi; "Autonomous Fault-Tolerant Systems onto SRAM-based FPGA Platforms" Journal of Electronic Testing, vol.29, issue 6, no., pp.779-793, December 2013// | + | * //__Citation__: **"Autonomous Fault-Tolerant Systems onto SRAM-based FPGA Platforms"**, Cristiana Bolchini, Antonio Miele, Chiara Sandionigi;, Journal of Electronic Testing, vol.29, issue 6, no., pp.779-793, December 2013// |
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| * **Fault Injection and Simulation for Fault Tolerant Reconfigurable Duplex System** (Stať ve sborníku) 2007, KUBALÍK P., KVASNIČKA J., KUBÁTOVÁ H. In Design and Diagnostics of Electronic Circuits and Systems. Los Alamitos: IEEE Computer Society, 2007, p. 357-360. ISBN 1-4244-1161-0. {{:publication:ddecs2007.pdf|pdf}} | * **Fault Injection and Simulation for Fault Tolerant Reconfigurable Duplex System** (Stať ve sborníku) 2007, KUBALÍK P., KVASNIČKA J., KUBÁTOVÁ H. In Design and Diagnostics of Electronic Circuits and Systems. Los Alamitos: IEEE Computer Society, 2007, p. 357-360. ISBN 1-4244-1161-0. {{:publication:ddecs2007.pdf|pdf}} | ||
| - | * //__Citation__: Jiahua Fan and Zhifeng Zhang; , "Speeding up Fault Simulation using Parallel Fault Simulation" Procedia Engineering, Elsevier, vol.15, no.0, pp.1817-1821, CEIS 2011// | + | * //__Citation__: **"Speeding up Fault Simulation using Parallel Fault Simulation"**, Jiahua Fan and Zhifeng Zhang;, Procedia Engineering, Elsevier, vol.15, no.0, pp.1817-1821, CEIS 2011// |
| * **An FPGA based fault emulator** (Stať ve sborníku) 2007, KVASNIČKA J., KUBALÍK P., KUBÁTOVÁ H. In Proceedings of the Work in Progress Session held in connection with the EUROMICRO Conferences SEAA and DSD 2007. Linz: Johannes Kepler University, 2007, p. 42-43. ISBN 978-3-902457-16-5. {{:publication:dsd2007.pdf|pdf}} | * **An FPGA based fault emulator** (Stať ve sborníku) 2007, KVASNIČKA J., KUBALÍK P., KUBÁTOVÁ H. In Proceedings of the Work in Progress Session held in connection with the EUROMICRO Conferences SEAA and DSD 2007. Linz: Johannes Kepler University, 2007, p. 42-43. ISBN 978-3-902457-16-5. {{:publication:dsd2007.pdf|pdf}} | ||
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| * **Fault Tolerant System Design Method Based on Self-Checking Circuits** (Stať ve sborníku) 2006, KUBALÍK P., FIŠER P., KUBÁTOVÁ H. In Proceedings IOLTS 2006 12th IEEE International On-Line Testing Symposium, IOLTS2006. Los Alamitos: IEEE Computer Society, 2006, p. 185-186. ISBN 0-7695-2620-9. {{:publication:iolts2006.pdf|pdf}} | * **Fault Tolerant System Design Method Based on Self-Checking Circuits** (Stať ve sborníku) 2006, KUBALÍK P., FIŠER P., KUBÁTOVÁ H. In Proceedings IOLTS 2006 12th IEEE International On-Line Testing Symposium, IOLTS2006. Los Alamitos: IEEE Computer Society, 2006, p. 185-186. ISBN 0-7695-2620-9. {{:publication:iolts2006.pdf|pdf}} | ||
| - | * //__Citation__: Ambegoda, A.L.A.T.D.; De Silva, W.T.S.; Hemachandra, K.T.; Samarasinghe, T.N.; Samarasinghe, A.T.L.K.; **"Centralized Traffic Controlling System for Sri Lanka Railways"**, Information and Automation for Sustainability, 2008. ICIAFS 2008. 4th International Conference on , vol., no., pp.145-149, 12-14 Dec. 2008// | + | * //__Citation__: **"Centralized Traffic Controlling System for Sri Lanka Railways"**, Ambegoda, A.L.A.T.D.; De Silva, W.T.S.; Hemachandra, K.T.; Samarasinghe, T.N.; Samarasinghe, A.T.L.K.;, Information and Automation for Sustainability, 2008. ICIAFS 2008. 4th International Conference on , vol., no., pp.145-149, 12-14 Dec. 2008// |
| - | * //__Citation__: Straka, M.; Kotasek, Z.; Winter, J.; , **"Digital Systems Architectures Based on On-line Checkers"** Digital System Design Architectures, Methods and Tools, 2008. DSD '08. 11th EUROMICRO Conference on , vol., no., pp.81-87, 3-5 Sept. 2008// | + | * //__Citation__: **"Digital Systems Architectures Based on On-line Checkers"**, Straka, M.; Kotasek, Z.; Winter, J.;, Digital System Design Architectures, Methods and Tools, 2008. DSD '08. 11th EUROMICRO Conference on , vol., no., pp.81-87, 3-5 Sept. 2008// |
| - | * //__Citation__: Straka, M.; Kotasek, Z.; **"High Availability Fault Tolerant Architectures Implemented into FPGAs"** Digital System Design, Architectures, Methods and Tools, 2009. DSD '09. 12th Euromicro Conference on , vol., no., pp.108-115, 27-29 Aug. 2009// | + | * //__Citation__: **"High Availability Fault Tolerant Architectures Implemented into FPGAs"**, Straka, M.; Kotasek, Z.;, Digital System Design, Architectures, Methods and Tools, 2009. DSD '09. 12th Euromicro Conference on , vol., no., pp.108-115, 27-29 Aug. 2009// |
| - | * //__Citation__: Straka, M.; Tobola, J.; Kotasek, Z.; **"Checker Design for On-line Testing of Xilinx FPGA Communication Protocols"**, Defect and Fault-Tolerance in VLSI Systems, 2007. DFT '07. 22nd IEEE International Symposium on , vol., no., pp.152-160, 26-28 Sept. 2007// | + | * //__Citation__: **"Checker Design for On-line Testing of Xilinx FPGA Communication Protocols"**, Straka, M.; Tobola, J.; Kotasek, Z.;, Defect and Fault-Tolerance in VLSI Systems, 2007. DFT '07. 22nd IEEE International Symposium on , vol., no., pp.152-160, 26-28 Sept. 2007// |
| - | * //__Citation__: Osnat Keren. 2010. One-to-Many: Context-Oriented Code for Concurrent Error Detection, Journal of Electronic Testing. 26, 3 (June 2010), 337-353.// | + | * //__Citation__: **"One-to-Many: Context-Oriented Code for Concurrent Error Detection"**, Osnat Keren, Journal of Electronic Testing. 26, 3 (June 2010), 337-353.// |
| - | * //__Citation__: Keren, O.; Levin, I.; Karpovsky, M.; , **"Duplication Based One-to-Many Coding for Trojan HW Detection"**, Defect and Fault Tolerance in VLSI Systems (DFT), 2010 IEEE 25th International Symposium on , vol., no., pp.160-166, 6-8 Oct. 2010// | + | * //__Citation__: **"Duplication Based One-to-Many Coding for Trojan HW Detection"**, Keren, O.; Levin, I.; Karpovsky, M.;, Defect and Fault Tolerance in VLSI Systems (DFT), 2010 IEEE 25th International Symposium on , vol., no., pp.160-166, 6-8 Oct. 2010// |
| - | * //__Citation__: Tobola, J.; Kotasek, Z.; Korenek, J.; Martinek, T.; Straka, M.; **"Online Protocol Testing for FPGA Based Fault Tolerant Systems"**. Digital System Design Architectures, Methods and Tools, 2007. DSD 2007. 10th Euromicro Conference on , vol., no., pp.676-679, 29-31 Aug. 2007// | + | * //__Citation__: **"Online Protocol Testing for FPGA Based Fault Tolerant Systems"**, Tobola, J.; Kotasek, Z.; Korenek, J.; Martinek, T.; Straka, M.;, Digital System Design Architectures, Methods and Tools, 2007. DSD 2007. 10th Euromicro Conference on , vol., no., pp.676-679, 29-31 Aug. 2007// |
| - | * //__Citation__: Kotásek Zdeněk, Straka Martin: **"The Design of On-line Checkers and Their Use in Verification and Testing"**, In: Acta Electrotechnica et Informatica, roč. 2009, č. 3, SK, s. 8-15, ISSN 1335-8243// | + | * //__Citation__: **"The Design of On-line Checkers and Their Use in Verification and Testing"**, Kotásek Zdeněk, Straka Martin, In: Acta Electrotechnica et Informatica, roč. 2009, č. 3, SK, s. 8-15, ISSN 1335-8243// |
| - | * //__Citation__: Mezzah, I.;Kermia, O. ; Chemali, H. ; Abdelmalek, O. ; Beroulle, V. ; Hely, D : **"Assertion based on-line fault detection applied on UHF RFID tag"**, In: Design and Test Symposium (IDT), 2013 8th IEEE International Design and Test Symposium,vol., no., pp.1-5, 16-18 Dec. 2013 // | + | * //__Citation__: **"Assertion based on-line fault detection applied on UHF RFID tag"**, Mezzah, I.;Kermia, O. ; Chemali, H. ; Abdelmalek, O. ; Beroulle, V. ; Hely, D.:, In: Design and Test Symposium (IDT), 2013 8th IEEE International Design and Test Symposium,vol., no., pp.1-5, 16-18 Dec. 2013 // |
| * **Dependable Design for FPGA based on Duplex System and Reconfiguration** (Stať ve sborníku) 2006, KUBALÍK P., DOBIÁŠ R., KUBÁTOVÁ H. In Proceedings of 9th Euromicro Conference on Digital System Design, DSD2006. Los Alamitos: IEEE Computer Society, 2006, p. 139-145. ISBN 0-7695-2609-8. {{:publication:dsd2006.pdf|pdf}} | * **Dependable Design for FPGA based on Duplex System and Reconfiguration** (Stať ve sborníku) 2006, KUBALÍK P., DOBIÁŠ R., KUBÁTOVÁ H. In Proceedings of 9th Euromicro Conference on Digital System Design, DSD2006. Los Alamitos: IEEE Computer Society, 2006, p. 139-145. ISBN 0-7695-2609-8. {{:publication:dsd2006.pdf|pdf}} | ||
| - | * //__Citation__: Silva, R.S.F.; Hesser, J.; Männer, R.; , **"Contract Specification for Hardware Interoperability Testing and Fault Analysis"**, Reliability, IEEE Transactions on , vol.60, no.1, pp.351-362, March 2011// | + | * //__Citation__: **"Contract Specification for Hardware Interoperability Testing and Fault Analysis"**, Silva, R.S.F.; Hesser, J.; Männer, R.;, Reliability, IEEE Transactions on , vol.60, no.1, pp.351-362, March 2011// |
| - | * //__Citation__: Straka, M.; Kotasek, Z.; **"High Availability Fault Tolerant Architectures Implemented into FPGAs"**, Digital System Design, Architectures, Methods and Tools, 2009. DSD '09. 12th Euromicro Conference on Digital System Design, vol., no., pp.108-115, 27-29 Aug. 2009.// | + | * //__Citation__: **"High Availability Fault Tolerant Architectures Implemented into FPGAs"**, Straka, M.; Kotasek, Z.;, Digital System Design, Architectures, Methods and Tools, 2009. DSD '09. 12th Euromicro Conference on Digital System Design, vol., no., pp.108-115, 27-29 Aug. 2009.// |
| - | * //__Citation__: Kastil, J.;Straka, M.;Miculka, L.; Kotasek, Z.; **"Dependability Analysis of Fault Tolerant Systems Based on Partial Dynamic Reconfiguration Implemented into FPGA"**, Digital System Design 2012. DSD '12. 15th Euromicro Conference on Digital System Design, vol., no., pp.250-257, 5-8 Sept. 2012.// | + | * //__Citation__: **"Dependability Analysis of Fault Tolerant Systems Based on Partial Dynamic Reconfiguration Implemented into FPGA"**, Kastil, J.;Straka, M.;Miculka, L.; Kotasek, Z.;, Digital System Design 2012. DSD '12. 15th Euromicro Conference on Digital System Design, vol., no., pp.250-257, 5-8 Sept. 2012.// |
| - | * //__Citation__: Martin Straka, Jan Kastil, Zdenek Kotasek, Lukas Miculka, **"Fault tolerant system design and SEU injection based testing"**, Microprocessors and Microsystems, Volume 37, Issue 2, March 2013, Pages 155-173, ISSN 0141-9331// | + | * //__Citation__: **"Fault tolerant system design and SEU injection based testing"**, Martin Straka, Jan Kastil, Zdenek Kotasek, Lukas Miculka, Microprocessors and Microsystems, Volume 37, Issue 2, March 2013, Pages 155-173, ISSN 0141-9331// |
| * **Dependability Computation for Fault Tolerant Reconfigurable Duplex System** (Stať ve sborníku) 2006, KUBALÍK P., DOBIÁŠ R., KUBÁTOVÁ H. In Proceedings of the 2006 IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, DDECS2006. Praha: CTU Publishing House, 2006, vol. 1, p. 100-102. ISBN 1-4244-0184-4. {{:publication:ddecs2006.pdf|pdf}} | * **Dependability Computation for Fault Tolerant Reconfigurable Duplex System** (Stať ve sborníku) 2006, KUBALÍK P., DOBIÁŠ R., KUBÁTOVÁ H. In Proceedings of the 2006 IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, DDECS2006. Praha: CTU Publishing House, 2006, vol. 1, p. 100-102. ISBN 1-4244-0184-4. {{:publication:ddecs2006.pdf|pdf}} | ||
| - | * //__Citation__: Mi Zhou, Lihong Shang, and Yu Hu, **"Reliability Optimization of Reconfigurable FPGA Based on Second-Order Approximation Domain-Partition"**, In Proceedings of the 2009 International Conference on Embedded Software and Systems (ICESS '09). IEEE Computer Society, Washington, DC, USA, 511-516// | + | * //__Citation__: **"Reliability Optimization of Reconfigurable FPGA Based on Second-Order Approximation Domain-Partition"**, Mi Zhou, Lihong Shang, and Yu Hu, In Proceedings of the 2009 International Conference on Embedded Software and Systems (ICESS '09). IEEE Computer Society, Washington, DC, USA, 511-516// |
| - | * //__Citation__: Mi Zhou, Lihong Shang, Yu Hu, **"Reliability Optimization of Reconfigurable Computing-Based Fault-Tolerant System"**, High Performance Computing and Communications, pp. 369-375, 11th IEEE International Conference on High Performance Computing and Communications, 2009// | + | * //__Citation__: **"Reliability Optimization of Reconfigurable Computing-Based Fault-Tolerant System"**, Mi Zhou, Lihong Shang, Yu Hu, High Performance Computing and Communications, pp. 369-375, 11th IEEE International Conference on High Performance Computing and Communications, 2009// |
| - | * //__Citation__: Shang, Lihong; Zhou, Mi; Hu, Yu; **"A fault-tolerant system-on-programmable-chip based on domain-partition and blind reconfiguration"**, Adaptive Hardware and Systems (AHS), 2010 NASA/ESA Conference on , vol., no., pp.297-303, 15-18 June 2010// | + | * //__Citation__: **"A fault-tolerant system-on-programmable-chip based on domain-partition and blind reconfiguration"**, Shang, Lihong; Zhou, Mi; Hu, Yu; Adaptive Hardware and Systems (AHS), 2010 NASA/ESA Conference on , vol., no., pp.297-303, 15-18 June 2010// |
| - | * //__Citation__: Straka, M.; Kotasek, Z.; **"High Availability Fault Tolerant Architectures Implemented into FPGAs"**, Digital System Design, Architectures, Methods and Tools, 2009. DSD '09. 12th Euromicro Conference on , vol., no., pp.108-115, 27-29 Aug. 2009.// | + | * //__Citation__: **"High Availability Fault Tolerant Architectures Implemented into FPGAs"**, Straka, M.; Kotasek, Z.; Digital System Design, Architectures, Methods and Tools, 2009. DSD '09. 12th Euromicro Conference on , vol., no., pp.108-115, 27-29 Aug. 2009.// |
| - | * //__Citation__: Anil Kumar and Shampa Chakarverty: **"Service Availability Driven Re-configurable Embedded System Design"**. ICISTM 2011, CCIS 141, pp. 265–276, 2011, Springer-Verlag Berlin Heidelberg 2011// | + | * //__Citation__: **"Service Availability Driven Re-configurable Embedded System Design"**, Anil Kumar and Shampa Chakarverty:, ICISTM 2011, CCIS 141, pp. 265–276, 2011, Springer-Verlag Berlin Heidelberg 2011// |
| + | * //__Citation__: **"Dependability Analysis of Fault Tolerant Systems Based on Partial Dynamic Reconfiguration Implemented into FPGA"**, Kastil, J.; Straka, M.; Miculka, L.; Kotasek, Z., Digital System Design (DSD), 2012 15th Euromicro Conference on , vol., no., pp.250,257, 5-8 Sept. 2012// | ||
| * **Design Methodology for High Reliable System** (Stať ve sborníku) 2006, KUBALÍK P., KUBÁTOVÁ H. In Proceedings of the Seventh International Scientific Conference on Electronic Computers and Informatics ECI 2006. Košice: Technická univerzita v Košiciach, 2006, vol. 1, p. 274-279. ISBN 80-8073-598-0. {{:publication:eci2006.pdf|pdf}} | * **Design Methodology for High Reliable System** (Stať ve sborníku) 2006, KUBALÍK P., KUBÁTOVÁ H. In Proceedings of the Seventh International Scientific Conference on Electronic Computers and Informatics ECI 2006. Košice: Technická univerzita v Košiciach, 2006, vol. 1, p. 274-279. ISBN 80-8073-598-0. {{:publication:eci2006.pdf|pdf}} | ||
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| * **Highly Reliable Design Based on TSC Circuits** (Paper in Conference Proceedings) 2005, KUBALÍK P., KUBÁTOVÁ H. In Počítačové architektury & diagnostika. Prague: CTU, Faculty of Electrical Engineering, Department of Computer Science and Engineering, 2005, vol. 1, p. 101-106. ISBN 80-01-03298-1. {{:publication:pad2005.pdf|pdf}} | * **Highly Reliable Design Based on TSC Circuits** (Paper in Conference Proceedings) 2005, KUBALÍK P., KUBÁTOVÁ H. In Počítačové architektury & diagnostika. Prague: CTU, Faculty of Electrical Engineering, Department of Computer Science and Engineering, 2005, vol. 1, p. 101-106. ISBN 80-01-03298-1. {{:publication:pad2005.pdf|pdf}} | ||
| * **Dependability Computations for Fault-Tolerant System Based on FPGA** (Paper in Conference Proceedings) 2005, DOBIÁŠ R., KUBALÍK P., KUBÁTOVÁ H. In Proceedings of the 12th International Conferrence on Electronics, Circuits and Systems. Monterey: IEEE Circuits and Systems Society, 2005, vol. 1, p. 377-380. ISBN 9973-61-100-4. {{:publication:icecs2005.pdf|pdf}} | * **Dependability Computations for Fault-Tolerant System Based on FPGA** (Paper in Conference Proceedings) 2005, DOBIÁŠ R., KUBALÍK P., KUBÁTOVÁ H. In Proceedings of the 12th International Conferrence on Electronics, Circuits and Systems. Monterey: IEEE Circuits and Systems Society, 2005, vol. 1, p. 377-380. ISBN 9973-61-100-4. {{:publication:icecs2005.pdf|pdf}} | ||
| - | * //__Citation__: Adam Jacobs, Grzegorz Cieslewski, Alan D. George, Ann Gordon-Ross, and Herman Lam. 2012. Reconfigurable Fault Tolerance: A Comprehensive Framework for Reliable and Adaptive FPGA-Based Space Computing. ACM Trans. Reconfigurable Technol. Syst. 5, 4, Article 21 (December 2012), 30 pages. // | + | * //__Citation__: **"Reconfigurable Fault Tolerance: A Comprehensive Framework for Reliable and Adaptive FPGA-Based Space Computing"**, Adam Jacobs, Grzegorz Cieslewski, Alan D. George, Ann Gordon-Ross, and Herman Lam., ACM Trans. Reconfigurable Technol. Syst. 5, 4, Article 21 (December 2012), 30 pages. // |
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| * **FPGA Implementation of USB 1.1 Device Core** (Paper in Electronic Proceedings (CD-ROM or web)) 2003, KUBALÍK P., BUČEK J. In Proceedings of Workshop 2003 (online) [CD-ROM]. Prague: CTU, 2003, vol. A, p. 304-305. ISBN 80-01-02708-2. | * **FPGA Implementation of USB 1.1 Device Core** (Paper in Electronic Proceedings (CD-ROM or web)) 2003, KUBALÍK P., BUČEK J. In Proceedings of Workshop 2003 (online) [CD-ROM]. Prague: CTU, 2003, vol. A, p. 304-305. ISBN 80-01-02708-2. | ||
| * **Design of Self Checking Circuits Based on FPGA** (Paper in Conference Proceedings) 2003, KUBALÍK P., KUBÁTOVÁ H. In Proceedings of the 15th International Conference on Microelectronics. Cairo: Cairo University, 2003, p. 378-381. ISBN 977-05-2010-1. {{:publication:icm2003.pdf|pdf}} | * **Design of Self Checking Circuits Based on FPGA** (Paper in Conference Proceedings) 2003, KUBALÍK P., KUBÁTOVÁ H. In Proceedings of the 15th International Conference on Microelectronics. Cairo: Cairo University, 2003, p. 378-381. ISBN 977-05-2010-1. {{:publication:icm2003.pdf|pdf}} | ||
| - | * //__Citation__: Cristiana Bolchini and Antonio Miele. 2008. Design Space Exploration for the Design of Reliable SRAM-Based FPGA Systems. In Proceedings of the 2008 IEEE International Symposium on Defect and Fault Tolerance of VLSI Systems (DFT '08). IEEE Computer Society, Washington, DC, USA, 332-340.// | + | * //__Citation__: **"Design Space Exploration for the Design of Reliable SRAM-Based FPGA Systems"**, Cristiana Bolchini and Antonio Miele, In Proceedings of the 2008 IEEE International Symposium on Defect and Fault Tolerance of VLSI Systems (DFT '08). IEEE Computer Society, Washington, DC, USA, 332-340. 2008.// |
| ===== Main page ===== | ===== Main page ===== | ||
| * [[:start|Pavel Kubalík's Home Page]] | * [[:start|Pavel Kubalík's Home Page]] | ||
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