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* //__Citation__: Cinzia Bernardeschi, Luca Cassano, Andrea Domenici,Giancarlo Gennaro, Mario Pasquariello; **"Simulated Injection of Radiation-Induced Logic Faults in FPGAs"** , The Third International Conference on Advances in System Testing and Validation Lifecycle, pp.84-89, VALID 2011// | * //__Citation__: Cinzia Bernardeschi, Luca Cassano, Andrea Domenici,Giancarlo Gennaro, Mario Pasquariello; **"Simulated Injection of Radiation-Induced Logic Faults in FPGAs"** , The Third International Conference on Advances in System Testing and Validation Lifecycle, pp.84-89, VALID 2011// | ||
* //__Citation__: Cinzia Bernardeschi, Luca Cassano, Mario G.C.A. Cimino, Andrea Domenici, **"GABES: A genetic algorithm based environment for SEU testing in SRAM-FPGAs"**, Journal of Systems Architecture, Volume 59, Issue 10, Part D, November 2013, Pages 1243-1254, ISSN 1383-7621// | * //__Citation__: Cinzia Bernardeschi, Luca Cassano, Mario G.C.A. Cimino, Andrea Domenici, **"GABES: A genetic algorithm based environment for SEU testing in SRAM-FPGAs"**, Journal of Systems Architecture, Volume 59, Issue 10, Part D, November 2013, Pages 1243-1254, ISSN 1383-7621// | ||
- | * //__Citation__: Trifonov, V.,: **"SAFETY AUTOMATA NETWORK FOR INTERLOCKING SYSTEM"**, Mechanics Transport Communications, Academic journal, 2011.// | + | * //__Citation__: Trifonov, V.,: **"Safety Automata Network for Interlocking System"**, Mechanics Transport Communications, Academic journal, 2011.// |
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* **Fault Tolerant System Design Method Based on Self-Checking Circuits** (Stať ve sborníku) 2006, KUBALÍK P., FIŠER P., KUBÁTOVÁ H. In Proceedings IOLTS 2006 12th IEEE International On-Line Testing Symposium, IOLTS2006. Los Alamitos: IEEE Computer Society, 2006, p. 185-186. ISBN 0-7695-2620-9. {{:publication:iolts2006.pdf|pdf}} | * **Fault Tolerant System Design Method Based on Self-Checking Circuits** (Stať ve sborníku) 2006, KUBALÍK P., FIŠER P., KUBÁTOVÁ H. In Proceedings IOLTS 2006 12th IEEE International On-Line Testing Symposium, IOLTS2006. Los Alamitos: IEEE Computer Society, 2006, p. 185-186. ISBN 0-7695-2620-9. {{:publication:iolts2006.pdf|pdf}} | ||
- | * //__Citation__: Ambegoda, A.L.A.T.D.; De Silva, W.T.S.; Hemachandra, K.T.; Samarasinghe, T.N.; Samarasinghe, A.T.L.K.; , "Centralized Traffic Controlling System for Sri Lanka Railways," Information and Automation for Sustainability, 2008. ICIAFS 2008. 4th International Conference on , vol., no., pp.145-149, 12-14 Dec. 2008// | + | * //__Citation__: Ambegoda, A.L.A.T.D.; De Silva, W.T.S.; Hemachandra, K.T.; Samarasinghe, T.N.; Samarasinghe, A.T.L.K.; **"Centralized Traffic Controlling System for Sri Lanka Railways"**, Information and Automation for Sustainability, 2008. ICIAFS 2008. 4th International Conference on , vol., no., pp.145-149, 12-14 Dec. 2008// |
- | * //__Citation__: Straka, M.; Kotasek, Z.; Winter, J.; , "Digital Systems Architectures Based on On-line Checkers," Digital System Design Architectures, Methods and Tools, 2008. DSD '08. 11th EUROMICRO Conference on , vol., no., pp.81-87, 3-5 Sept. 2008// | + | * //__Citation__: Straka, M.; Kotasek, Z.; Winter, J.; , **"Digital Systems Architectures Based on On-line Checkers"** Digital System Design Architectures, Methods and Tools, 2008. DSD '08. 11th EUROMICRO Conference on , vol., no., pp.81-87, 3-5 Sept. 2008// |
- | * //__Citation__: Straka, M.; Kotasek, Z.; , "High Availability Fault Tolerant Architectures Implemented into FPGAs," Digital System Design, Architectures, Methods and Tools, 2009. DSD '09. 12th Euromicro Conference on , vol., no., pp.108-115, 27-29 Aug. 2009// | + | * //__Citation__: Straka, M.; Kotasek, Z.; **"High Availability Fault Tolerant Architectures Implemented into FPGAs"** Digital System Design, Architectures, Methods and Tools, 2009. DSD '09. 12th Euromicro Conference on , vol., no., pp.108-115, 27-29 Aug. 2009// |
- | * //__Citation__: Straka, M.; Tobola, J.; Kotasek, Z.; , "Checker Design for On-line Testing of Xilinx FPGA Communication Protocols," Defect and Fault-Tolerance in VLSI Systems, 2007. DFT '07. 22nd IEEE International Symposium on , vol., no., pp.152-160, 26-28 Sept. 2007// | + | * //__Citation__: Straka, M.; Tobola, J.; Kotasek, Z.; **"Checker Design for On-line Testing of Xilinx FPGA Communication Protocols"**, Defect and Fault-Tolerance in VLSI Systems, 2007. DFT '07. 22nd IEEE International Symposium on , vol., no., pp.152-160, 26-28 Sept. 2007// |
* //__Citation__: Osnat Keren. 2010. One-to-Many: Context-Oriented Code for Concurrent Error Detection, Journal of Electronic Testing. 26, 3 (June 2010), 337-353.// | * //__Citation__: Osnat Keren. 2010. One-to-Many: Context-Oriented Code for Concurrent Error Detection, Journal of Electronic Testing. 26, 3 (June 2010), 337-353.// | ||
- | * //__Citation__: Keren, O.; Levin, I.; Karpovsky, M.; , "Duplication Based One-to-Many Coding for Trojan HW Detection," Defect and Fault Tolerance in VLSI Systems (DFT), 2010 IEEE 25th International Symposium on , vol., no., pp.160-166, 6-8 Oct. 2010// | + | * //__Citation__: Keren, O.; Levin, I.; Karpovsky, M.; , **"Duplication Based One-to-Many Coding for Trojan HW Detection"**, Defect and Fault Tolerance in VLSI Systems (DFT), 2010 IEEE 25th International Symposium on , vol., no., pp.160-166, 6-8 Oct. 2010// |
- | * //__Citation__: Tobola, J.; Kotasek, Z.; Korenek, J.; Martinek, T.; Straka, M.; , "Online Protocol Testing for FPGA Based Fault Tolerant Systems," Digital System Design Architectures, Methods and Tools, 2007. DSD 2007. 10th Euromicro Conference on , vol., no., pp.676-679, 29-31 Aug. 2007// | + | * //__Citation__: Tobola, J.; Kotasek, Z.; Korenek, J.; Martinek, T.; Straka, M.; **"Online Protocol Testing for FPGA Based Fault Tolerant Systems"**. Digital System Design Architectures, Methods and Tools, 2007. DSD 2007. 10th Euromicro Conference on , vol., no., pp.676-679, 29-31 Aug. 2007// |
- | * //__Citation__: Kotásek Zdeněk, Straka Martin: The Design of On-line Checkers and Their Use in Verification and Testing, In: Acta Electrotechnica et Informatica, roč. 2009, č. 3, SK, s. 8-15, ISSN 1335-8243// | + | * //__Citation__: Kotásek Zdeněk, Straka Martin: **"The Design of On-line Checkers and Their Use in Verification and Testing"**, In: Acta Electrotechnica et Informatica, roč. 2009, č. 3, SK, s. 8-15, ISSN 1335-8243// |
- | * //__Citation__: Mezzah, I.;Kermia, O. ; Chemali, H. ; Abdelmalek, O. ; Beroulle, V. ; Hely, D : Assertion based on-line fault detection applied on UHF RFID tag, In: Design and Test Symposium (IDT), 2013 8th IEEE International Design and Test Symposium,vol., no., pp.1-5, 16-18 Dec. 2013 // | + | * //__Citation__: Mezzah, I.;Kermia, O. ; Chemali, H. ; Abdelmalek, O. ; Beroulle, V. ; Hely, D : **"Assertion based on-line fault detection applied on UHF RFID tag"**, In: Design and Test Symposium (IDT), 2013 8th IEEE International Design and Test Symposium,vol., no., pp.1-5, 16-18 Dec. 2013 // |
* **Dependable Design for FPGA based on Duplex System and Reconfiguration** (Stať ve sborníku) 2006, KUBALÍK P., DOBIÁŠ R., KUBÁTOVÁ H. In Proceedings of 9th Euromicro Conference on Digital System Design, DSD2006. Los Alamitos: IEEE Computer Society, 2006, p. 139-145. ISBN 0-7695-2609-8. {{:publication:dsd2006.pdf|pdf}} | * **Dependable Design for FPGA based on Duplex System and Reconfiguration** (Stať ve sborníku) 2006, KUBALÍK P., DOBIÁŠ R., KUBÁTOVÁ H. In Proceedings of 9th Euromicro Conference on Digital System Design, DSD2006. Los Alamitos: IEEE Computer Society, 2006, p. 139-145. ISBN 0-7695-2609-8. {{:publication:dsd2006.pdf|pdf}} | ||
- | * //__Citation__: Silva, R.S.F.; Hesser, J.; Männer, R.; , "Contract Specification for Hardware Interoperability Testing and Fault Analysis," Reliability, IEEE Transactions on , vol.60, no.1, pp.351-362, March 2011// | + | * //__Citation__: Silva, R.S.F.; Hesser, J.; Männer, R.; , **"Contract Specification for Hardware Interoperability Testing and Fault Analysis"**, Reliability, IEEE Transactions on , vol.60, no.1, pp.351-362, March 2011// |
- | * //__Citation__: Straka, M.; Kotasek, Z.; , "High Availability Fault Tolerant Architectures Implemented into FPGAs," Digital System Design, Architectures, Methods and Tools, 2009. DSD '09. 12th Euromicro Conference on Digital System Design, vol., no., pp.108-115, 27-29 Aug. 2009.// | + | * //__Citation__: Straka, M.; Kotasek, Z.; **"High Availability Fault Tolerant Architectures Implemented into FPGAs"**, Digital System Design, Architectures, Methods and Tools, 2009. DSD '09. 12th Euromicro Conference on Digital System Design, vol., no., pp.108-115, 27-29 Aug. 2009.// |
- | * //__Citation__: Kastil, J.;Straka, M.;Miculka, L.; Kotasek, Z.; , "Dependability Analysis of Fault Tolerant Systems Based on Partial Dynamic Reconfiguration Implemented into FPGA," Digital System Design 2012. DSD '12. 15th Euromicro Conference on Digital System Design, vol., no., pp.250-257, 5-8 Sept. 2012.// | + | * //__Citation__: Kastil, J.;Straka, M.;Miculka, L.; Kotasek, Z.; **"Dependability Analysis of Fault Tolerant Systems Based on Partial Dynamic Reconfiguration Implemented into FPGA"**, Digital System Design 2012. DSD '12. 15th Euromicro Conference on Digital System Design, vol., no., pp.250-257, 5-8 Sept. 2012.// |
- | * //__Citation__: Martin Straka, Jan Kastil, Zdenek Kotasek, Lukas Miculka, Fault tolerant system design and SEU injection based testing, Microprocessors and Microsystems, Volume 37, Issue 2, March 2013, Pages 155-173, ISSN 0141-9331// | + | * //__Citation__: Martin Straka, Jan Kastil, Zdenek Kotasek, Lukas Miculka, **"Fault tolerant system design and SEU injection based testing"**, Microprocessors and Microsystems, Volume 37, Issue 2, March 2013, Pages 155-173, ISSN 0141-9331// |
* **Dependability Computation for Fault Tolerant Reconfigurable Duplex System** (Stať ve sborníku) 2006, KUBALÍK P., DOBIÁŠ R., KUBÁTOVÁ H. In Proceedings of the 2006 IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, DDECS2006. Praha: CTU Publishing House, 2006, vol. 1, p. 100-102. ISBN 1-4244-0184-4. {{:publication:ddecs2006.pdf|pdf}} | * **Dependability Computation for Fault Tolerant Reconfigurable Duplex System** (Stať ve sborníku) 2006, KUBALÍK P., DOBIÁŠ R., KUBÁTOVÁ H. In Proceedings of the 2006 IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, DDECS2006. Praha: CTU Publishing House, 2006, vol. 1, p. 100-102. ISBN 1-4244-0184-4. {{:publication:ddecs2006.pdf|pdf}} | ||
- | * //__Citation__: Mi Zhou, Lihong Shang, and Yu Hu, "Reliability Optimization of Reconfigurable FPGA Based on Second-Order Approximation Domain-Partition", In Proceedings of the 2009 International Conference on Embedded Software and Systems (ICESS '09). IEEE Computer Society, Washington, DC, USA, 511-516// | + | * //__Citation__: Mi Zhou, Lihong Shang, and Yu Hu, **"Reliability Optimization of Reconfigurable FPGA Based on Second-Order Approximation Domain-Partition"**, In Proceedings of the 2009 International Conference on Embedded Software and Systems (ICESS '09). IEEE Computer Society, Washington, DC, USA, 511-516// |
- | * //__Citation__: Mi Zhou, Lihong Shang, Yu Hu, "Reliability Optimization of Reconfigurable Computing-Based Fault-Tolerant System," High Performance Computing and Communications, pp. 369-375, 11th IEEE International Conference on High Performance Computing and Communications, 2009// | + | * //__Citation__: Mi Zhou, Lihong Shang, Yu Hu, **"Reliability Optimization of Reconfigurable Computing-Based Fault-Tolerant System"**, High Performance Computing and Communications, pp. 369-375, 11th IEEE International Conference on High Performance Computing and Communications, 2009// |
- | * //__Citation__: Shang, Lihong; Zhou, Mi; Hu, Yu; , "A fault-tolerant system-on-programmable-chip based on domain-partition and blind reconfiguration," Adaptive Hardware and Systems (AHS), 2010 NASA/ESA Conference on , vol., no., pp.297-303, 15-18 June 2010// | + | * //__Citation__: Shang, Lihong; Zhou, Mi; Hu, Yu; **"A fault-tolerant system-on-programmable-chip based on domain-partition and blind reconfiguration"**, Adaptive Hardware and Systems (AHS), 2010 NASA/ESA Conference on , vol., no., pp.297-303, 15-18 June 2010// |
- | * //__Citation__: Straka, M.; Kotasek, Z.; , "High Availability Fault Tolerant Architectures Implemented into FPGAs," Digital System Design, Architectures, Methods and Tools, 2009. DSD '09. 12th Euromicro Conference on , vol., no., pp.108-115, 27-29 Aug. 2009.// | + | * //__Citation__: Straka, M.; Kotasek, Z.; **"High Availability Fault Tolerant Architectures Implemented into FPGAs"**, Digital System Design, Architectures, Methods and Tools, 2009. DSD '09. 12th Euromicro Conference on , vol., no., pp.108-115, 27-29 Aug. 2009.// |
- | * //__Citation__: Anil Kumar and Shampa Chakarverty: "Service Availability Driven Re-configurable Embedded System Design" ICISTM 2011, CCIS 141, pp. 265–276, 2011, Springer-Verlag Berlin Heidelberg 2011// | + | * //__Citation__: Anil Kumar and Shampa Chakarverty: **"Service Availability Driven Re-configurable Embedded System Design"**. ICISTM 2011, CCIS 141, pp. 265–276, 2011, Springer-Verlag Berlin Heidelberg 2011// |