publication:public_list
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publication:public_list [2012/02/23 12:08] xkubalik [2007] |
publication:public_list [2012/02/24 19:01] xkubalik [2011] |
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| ====== All publications ====== | ====== All publications ====== | ||
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| + | ==== 2011 ==== | ||
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| + | * **Fault-tolerant and fail-safe design based on reconfiguration**, Kubátová,H., Kubalík, P., Capture in book: Design and Test Technology for Dependable Systems-on-Chip, 2011, pp.(175-194) | ||
| + | * **Fault Models Usability Study for On-line Tested FPGA**, Borecký,J., Kohlík,M., Kubátová,H., Kubalík, P., Proceedings of the 13th Euromicro Conference on Digital System Design, Oulu, 2011, pp.(287-290) | ||
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| ==== 2010 ==== | ==== 2010 ==== | ||
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| * **Reliable Railway Station System based on Regular Structure implemented in FPGA**, Borecký,J., Kubalík,P., Kubátová,H, Proc. of 12th EUROMICRO Conference on Digital System Design, Patras, 2009, pp.(348-354). {{:publication:dsd2009.pdf|pdf}} | * **Reliable Railway Station System based on Regular Structure implemented in FPGA**, Borecký,J., Kubalík,P., Kubátová,H, Proc. of 12th EUROMICRO Conference on Digital System Design, Patras, 2009, pp.(348-354). {{:publication:dsd2009.pdf|pdf}} | ||
| + | * //__Citation__: Cinzia Bernardeschi, Luca Cassano, Andrea Domenici,Giancarlo Gennaro, Mario Pasquariello; "Simulated Injection of Radiation-Induced Logic Faults in FPGAs" , The Third International Conference on Advances in System Testing and Validation Lifecycle, pp.84-89, VALID 2011// | ||
| ==== 2008 ==== | ==== 2008 ==== | ||
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| * **Fault Injection and Simulation for Fault Tolerant Reconfigurable Duplex System** (Stať ve sborníku) 2007, KUBALÍK P., KVASNIČKA J., KUBÁTOVÁ H. In Design and Diagnostics of Electronic Circuits and Systems. Los Alamitos: IEEE Computer Society, 2007, p. 357-360. ISBN 1-4244-1161-0. {{:publication:ddecs2007.pdf|pdf}} | * **Fault Injection and Simulation for Fault Tolerant Reconfigurable Duplex System** (Stať ve sborníku) 2007, KUBALÍK P., KVASNIČKA J., KUBÁTOVÁ H. In Design and Diagnostics of Electronic Circuits and Systems. Los Alamitos: IEEE Computer Society, 2007, p. 357-360. ISBN 1-4244-1161-0. {{:publication:ddecs2007.pdf|pdf}} | ||
| - | * //__Citation__: Jiahua Fan and Zhifeng Zhang; , "Speeding up Fault Simulation using Parallel Fault Simulation," Procedia Engineering Elsevier, vol.15, no.0, pp.1817-1821, CEIS 2011// | + | * //__Citation__: Jiahua Fan and Zhifeng Zhang; , "Speeding up Fault Simulation using Parallel Fault Simulation" Procedia Engineering, Elsevier, vol.15, no.0, pp.1817-1821, CEIS 2011// |
| * **An FPGA based fault emulator** (Stať ve sborníku) 2007, KVASNIČKA J., KUBALÍK P., KUBÁTOVÁ H. In Proceedings of the Work in Progress Session held in connection with the EUROMICRO Conferences SEAA and DSD 2007. Linz: Johannes Kepler University, 2007, p. 42-43. ISBN 978-3-902457-16-5. {{:publication:dsd2007.pdf|pdf}} | * **An FPGA based fault emulator** (Stať ve sborníku) 2007, KVASNIČKA J., KUBALÍK P., KUBÁTOVÁ H. In Proceedings of the Work in Progress Session held in connection with the EUROMICRO Conferences SEAA and DSD 2007. Linz: Johannes Kepler University, 2007, p. 42-43. ISBN 978-3-902457-16-5. {{:publication:dsd2007.pdf|pdf}} | ||
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| * [[:start|Pavel Kubalík's Home Page]] | * [[:start|Pavel Kubalík's Home Page]] | ||
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publication/public_list.txt · Last modified: 2017/10/10 12:14 by xkubalik
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