publication:public_list
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publication:public_list [2011/06/06 13:37] xkubalik [2006] |
publication:public_list [2014/02/28 14:41] xkubalik [2008] |
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| ====== All publications ====== | ====== All publications ====== | ||
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| + | ==== 2013 ==== | ||
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| + | * **Comparison of FPGA and ASIC Implementation of a Linear Congruence Solver**, Buček, J., Kubalík, P., Zahradnický, T., Lorencz, R., Proceedings of 16th Euromicro Conference on Digital System Design, DSD 2013, pp.(284-287). {{:publication:dsd2013.pdf|pdf}} | ||
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| + | ==== 2012 ==== | ||
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| + | * **Dedicated Hardware Implementation of a Linear Congruence Solver in FPGA**, Buček, J., Kubalík, P., Zahradnický, T., Lorencz, R., Proceedings of the 19th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2012, pp.(689-692). {{:publication:icecs2012.pdf|pdf}} | ||
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| + | ==== 2011 ==== | ||
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| + | * **Fault-tolerant and fail-safe design based on reconfiguration**, Kubátová,H., Kubalík, P., Chapter in book: Design and Test Technology for Dependable Systems-on-Chip, 2011, pp.(175-194) | ||
| + | * **Fault Models Usability Study for On-line Tested FPGA**, Borecký,J., Kohlík,M., Kubátová,H., Kubalík, P., Proceedings of the 13th Euromicro Conference on Digital System Design, Oulu, 2011, pp.(287-290) {{:publication:dsd2011.pdf|pdf}} | ||
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| ==== 2010 ==== | ==== 2010 ==== | ||
| - | * **Faults Coverage Improvement based on Fault Simulation and Partial Duplication**, Borecký,J., Kohlík,M., Kubátová,H., Kubalík, P., Proceedings of the 13th Euromicro Conference on Digital System Design, Lille, 2010, pp.(380-386) | + | * **Faults Coverage Improvement based on Fault Simulation and Partial Duplication**, Borecký,J., Kohlík,M., Kubátová,H., Kubalík, P., Proceedings of the 13th Euromicro Conference on Digital System Design, Lille, 2010, pp.(380-386) {{:publication:dsd2010.pdf|pdf}} |
| ==== 2009 ==== | ==== 2009 ==== | ||
| * **Reliable Railway Station System based on Regular Structure implemented in FPGA**, Borecký,J., Kubalík,P., Kubátová,H, Proc. of 12th EUROMICRO Conference on Digital System Design, Patras, 2009, pp.(348-354). {{:publication:dsd2009.pdf|pdf}} | * **Reliable Railway Station System based on Regular Structure implemented in FPGA**, Borecký,J., Kubalík,P., Kubátová,H, Proc. of 12th EUROMICRO Conference on Digital System Design, Patras, 2009, pp.(348-354). {{:publication:dsd2009.pdf|pdf}} | ||
| + | * //__Citation__: Cinzia Bernardeschi, Luca Cassano, Andrea Domenici,Giancarlo Gennaro, Mario Pasquariello; "Simulated Injection of Radiation-Induced Logic Faults in FPGAs" , The Third International Conference on Advances in System Testing and Validation Lifecycle, pp.84-89, VALID 2011// | ||
| ==== 2008 ==== | ==== 2008 ==== | ||
| * **Dependable design technique for system-on-chip** (Článek) 2008, KUBALÍK P., KUBÁTOVÁ H. Journal of Systems Architecture. 2008, vol. 2008, no. 54, p. 452-464. ISSN 1383-7621. | * **Dependable design technique for system-on-chip** (Článek) 2008, KUBALÍK P., KUBÁTOVÁ H. Journal of Systems Architecture. 2008, vol. 2008, no. 54, p. 452-464. ISSN 1383-7621. | ||
| + | * //__Citation__: Sergio Cuenca-Asensia, Antonio Martínez-Álvareza, Felipe Restrepo-Callea, Francisco R. Palomob, Hipólito Guzmán-Mirandab, Miguel A. Aguirreb; "Soft core based embedded systems in critical aerospace applications" Journal of Systems Architecture, vol.57, isue 10, no.0, pp.886-895, November 2011// | ||
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| * **An Efficient Multiple-Parity Generator Design for On-Line Testing on FPGA** (Stať ve sborníku) 2008, FIŠER P., KUBALÍK P., KUBÁTOVÁ H. In Proceedings of 11th Euromicro Conference on Digital System Design. Los Alamitos: IEEE Computer Society, 2008, p. 96-99. ISBN 978-0-7695-3277-6. {{:publication:dsd2008_fiser.pdf|pdf}} | * **An Efficient Multiple-Parity Generator Design for On-Line Testing on FPGA** (Stať ve sborníku) 2008, FIŠER P., KUBALÍK P., KUBÁTOVÁ H. In Proceedings of 11th Euromicro Conference on Digital System Design. Los Alamitos: IEEE Computer Society, 2008, p. 96-99. ISBN 978-0-7695-3277-6. {{:publication:dsd2008_fiser.pdf|pdf}} | ||
| * **Experimental SEU Impact on Digital Design Implemented in FPGAs** (Stať ve sborníku) 2008, KVASNIČKA J., KUBALÍK P., KUBÁTOVÁ H. In Proceedings of 11th Euromicro Conference on Digital System Design. Los Alamitos: IEEE Computer Society, 2008, p. 100-103. ISBN 978-0-7695-3277-6. {{:publication:dsd2008_kvasnicka.pdf|pdf}} | * **Experimental SEU Impact on Digital Design Implemented in FPGAs** (Stať ve sborníku) 2008, KVASNIČKA J., KUBALÍK P., KUBÁTOVÁ H. In Proceedings of 11th Euromicro Conference on Digital System Design. Los Alamitos: IEEE Computer Society, 2008, p. 100-103. ISBN 978-0-7695-3277-6. {{:publication:dsd2008_kvasnicka.pdf|pdf}} | ||
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| * **Fault Injection and Simulation for Fault Tolerant Reconfigurable Duplex System** (Stať ve sborníku) 2007, KUBALÍK P., KVASNIČKA J., KUBÁTOVÁ H. In Design and Diagnostics of Electronic Circuits and Systems. Los Alamitos: IEEE Computer Society, 2007, p. 357-360. ISBN 1-4244-1161-0. {{:publication:ddecs2007.pdf|pdf}} | * **Fault Injection and Simulation for Fault Tolerant Reconfigurable Duplex System** (Stať ve sborníku) 2007, KUBALÍK P., KVASNIČKA J., KUBÁTOVÁ H. In Design and Diagnostics of Electronic Circuits and Systems. Los Alamitos: IEEE Computer Society, 2007, p. 357-360. ISBN 1-4244-1161-0. {{:publication:ddecs2007.pdf|pdf}} | ||
| + | * //__Citation__: Jiahua Fan and Zhifeng Zhang; , "Speeding up Fault Simulation using Parallel Fault Simulation" Procedia Engineering, Elsevier, vol.15, no.0, pp.1817-1821, CEIS 2011// | ||
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| * **An FPGA based fault emulator** (Stať ve sborníku) 2007, KVASNIČKA J., KUBALÍK P., KUBÁTOVÁ H. In Proceedings of the Work in Progress Session held in connection with the EUROMICRO Conferences SEAA and DSD 2007. Linz: Johannes Kepler University, 2007, p. 42-43. ISBN 978-3-902457-16-5. {{:publication:dsd2007.pdf|pdf}} | * **An FPGA based fault emulator** (Stať ve sborníku) 2007, KVASNIČKA J., KUBALÍK P., KUBÁTOVÁ H. In Proceedings of the Work in Progress Session held in connection with the EUROMICRO Conferences SEAA and DSD 2007. Linz: Johannes Kepler University, 2007, p. 42-43. ISBN 978-3-902457-16-5. {{:publication:dsd2007.pdf|pdf}} | ||
| * **Design of Self Checking Circuits Based on FPGAs** (Dissertation thesis (Ph.D.)) 2007, KUBALÍK P. [PhD Thesis]. Prague: CTU, Faculty of Electrical Engineering, Department of Computer Science and Engineering, 2007. 71 p. {{:publication:disert2007.pdf|pdf}} | * **Design of Self Checking Circuits Based on FPGAs** (Dissertation thesis (Ph.D.)) 2007, KUBALÍK P. [PhD Thesis]. Prague: CTU, Faculty of Electrical Engineering, Department of Computer Science and Engineering, 2007. 71 p. {{:publication:disert2007.pdf|pdf}} | ||
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| ==== 2006 ==== | ==== 2006 ==== | ||
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| * //__Citation__: Tobola, J.; Kotasek, Z.; Korenek, J.; Martinek, T.; Straka, M.; , "Online Protocol Testing for FPGA Based Fault Tolerant Systems," Digital System Design Architectures, Methods and Tools, 2007. DSD 2007. 10th Euromicro Conference on , vol., no., pp.676-679, 29-31 Aug. 2007// | * //__Citation__: Tobola, J.; Kotasek, Z.; Korenek, J.; Martinek, T.; Straka, M.; , "Online Protocol Testing for FPGA Based Fault Tolerant Systems," Digital System Design Architectures, Methods and Tools, 2007. DSD 2007. 10th Euromicro Conference on , vol., no., pp.676-679, 29-31 Aug. 2007// | ||
| * //__Citation__: Kotásek Zdeněk, Straka Martin: The Design of On-line Checkers and Their Use in Verification and Testing, In: Acta Electrotechnica et Informatica, roč. 2009, č. 3, SK, s. 8-15, ISSN 1335-8243// | * //__Citation__: Kotásek Zdeněk, Straka Martin: The Design of On-line Checkers and Their Use in Verification and Testing, In: Acta Electrotechnica et Informatica, roč. 2009, č. 3, SK, s. 8-15, ISSN 1335-8243// | ||
| + | * //__Citation__: Mezzah, I.;Kermia, O. ; Chemali, H. ; Abdelmalek, O. ; Beroulle, V. ; Hely, D : Assertion based on-line fault detection applied on UHF RFID tag, In: Design and Test Symposium (IDT), 2013 8th IEEE International Design and Test Symposium,vol., no., pp.1-5, 16-18 Dec. 2013 // | ||
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| * **Dependable Design for FPGA based on Duplex System and Reconfiguration** (Stať ve sborníku) 2006, KUBALÍK P., DOBIÁŠ R., KUBÁTOVÁ H. In Proceedings of 9th Euromicro Conference on Digital System Design, DSD2006. Los Alamitos: IEEE Computer Society, 2006, p. 139-145. ISBN 0-7695-2609-8. {{:publication:dsd2006.pdf|pdf}} | * **Dependable Design for FPGA based on Duplex System and Reconfiguration** (Stať ve sborníku) 2006, KUBALÍK P., DOBIÁŠ R., KUBÁTOVÁ H. In Proceedings of 9th Euromicro Conference on Digital System Design, DSD2006. Los Alamitos: IEEE Computer Society, 2006, p. 139-145. ISBN 0-7695-2609-8. {{:publication:dsd2006.pdf|pdf}} | ||
| * //__Citation__: Silva, R.S.F.; Hesser, J.; Männer, R.; , "Contract Specification for Hardware Interoperability Testing and Fault Analysis," Reliability, IEEE Transactions on , vol.60, no.1, pp.351-362, March 2011// | * //__Citation__: Silva, R.S.F.; Hesser, J.; Männer, R.; , "Contract Specification for Hardware Interoperability Testing and Fault Analysis," Reliability, IEEE Transactions on , vol.60, no.1, pp.351-362, March 2011// | ||
| - | * //__Citation__: Straka, M.; Kotasek, Z.; , "High Availability Fault Tolerant Architectures Implemented into FPGAs," Digital System Design, Architectures, Methods and Tools, 2009. DSD '09. 12th Euromicro Conference on , vol., no., pp.108-115, 27-29 Aug. 2009.// | + | * //__Citation__: Straka, M.; Kotasek, Z.; , "High Availability Fault Tolerant Architectures Implemented into FPGAs," Digital System Design, Architectures, Methods and Tools, 2009. DSD '09. 12th Euromicro Conference on Digital System Design, vol., no., pp.108-115, 27-29 Aug. 2009.// |
| + | * //__Citation__: Kastil, J.;Straka, M.;Miculka, L.; Kotasek, Z.; , "Dependability Analysis of Fault Tolerant Systems Based on Partial Dynamic Reconfiguration Implemented into FPGA," Digital System Design 2012. DSD '12. 15th Euromicro Conference on Digital System Design, vol., no., pp.250-257, 5-8 Sept. 2012.// | ||
| * **Dependability Computation for Fault Tolerant Reconfigurable Duplex System** (Stať ve sborníku) 2006, KUBALÍK P., DOBIÁŠ R., KUBÁTOVÁ H. In Proceedings of the 2006 IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, DDECS2006. Praha: CTU Publishing House, 2006, vol. 1, p. 100-102. ISBN 1-4244-0184-4. {{:publication:ddecs2006.pdf|pdf}} | * **Dependability Computation for Fault Tolerant Reconfigurable Duplex System** (Stať ve sborníku) 2006, KUBALÍK P., DOBIÁŠ R., KUBÁTOVÁ H. In Proceedings of the 2006 IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, DDECS2006. Praha: CTU Publishing House, 2006, vol. 1, p. 100-102. ISBN 1-4244-0184-4. {{:publication:ddecs2006.pdf|pdf}} | ||
| - | * //__Citation__: Mi Zhou, Lihong Shang, and Yu Hu. 2009. Reliability Optimization of Reconfigurable FPGA Based on Second-Order Approximation Domain-Partition. In Proceedings of the 2009 International Conference on Embedded Software and Systems (ICESS '09). IEEE Computer Society, Washington, DC, USA, 511-516// | + | * //__Citation__: Mi Zhou, Lihong Shang, and Yu Hu, "Reliability Optimization of Reconfigurable FPGA Based on Second-Order Approximation Domain-Partition", In Proceedings of the 2009 International Conference on Embedded Software and Systems (ICESS '09). IEEE Computer Society, Washington, DC, USA, 511-516// |
| * //__Citation__: Mi Zhou, Lihong Shang, Yu Hu, "Reliability Optimization of Reconfigurable Computing-Based Fault-Tolerant System," High Performance Computing and Communications, pp. 369-375, 11th IEEE International Conference on High Performance Computing and Communications, 2009// | * //__Citation__: Mi Zhou, Lihong Shang, Yu Hu, "Reliability Optimization of Reconfigurable Computing-Based Fault-Tolerant System," High Performance Computing and Communications, pp. 369-375, 11th IEEE International Conference on High Performance Computing and Communications, 2009// | ||
| * //__Citation__: Shang, Lihong; Zhou, Mi; Hu, Yu; , "A fault-tolerant system-on-programmable-chip based on domain-partition and blind reconfiguration," Adaptive Hardware and Systems (AHS), 2010 NASA/ESA Conference on , vol., no., pp.297-303, 15-18 June 2010// | * //__Citation__: Shang, Lihong; Zhou, Mi; Hu, Yu; , "A fault-tolerant system-on-programmable-chip based on domain-partition and blind reconfiguration," Adaptive Hardware and Systems (AHS), 2010 NASA/ESA Conference on , vol., no., pp.297-303, 15-18 June 2010// | ||
| * //__Citation__: Straka, M.; Kotasek, Z.; , "High Availability Fault Tolerant Architectures Implemented into FPGAs," Digital System Design, Architectures, Methods and Tools, 2009. DSD '09. 12th Euromicro Conference on , vol., no., pp.108-115, 27-29 Aug. 2009.// | * //__Citation__: Straka, M.; Kotasek, Z.; , "High Availability Fault Tolerant Architectures Implemented into FPGAs," Digital System Design, Architectures, Methods and Tools, 2009. DSD '09. 12th Euromicro Conference on , vol., no., pp.108-115, 27-29 Aug. 2009.// | ||
| + | * //__Citation__: Anil Kumar and Shampa Chakarverty: "Service Availability Driven Re-configurable Embedded System Design" ICISTM 2011, CCIS 141, pp. 265–276, 2011, Springer-Verlag Berlin Heidelberg 2011// | ||
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| * **Design Methodology for High Reliable System** (Stať ve sborníku) 2006, KUBALÍK P., KUBÁTOVÁ H. In Proceedings of the Seventh International Scientific Conference on Electronic Computers and Informatics ECI 2006. Košice: Technická univerzita v Košiciach, 2006, vol. 1, p. 274-279. ISBN 80-8073-598-0. {{:publication:eci2006.pdf|pdf}} | * **Design Methodology for High Reliable System** (Stať ve sborníku) 2006, KUBALÍK P., KUBÁTOVÁ H. In Proceedings of the Seventh International Scientific Conference on Electronic Computers and Informatics ECI 2006. Košice: Technická univerzita v Košiciach, 2006, vol. 1, p. 274-279. ISBN 80-8073-598-0. {{:publication:eci2006.pdf|pdf}} | ||
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| * [[:start|Pavel Kubalík's Home Page]] | * [[:start|Pavel Kubalík's Home Page]] | ||
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publication/public_list.txt · Last modified: 2017/10/10 12:14 by xkubalik
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