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* //__Citation__: Straka, M.; Kotasek, Z.; Winter, J.; , "Digital Systems Architectures Based on On-line Checkers," Digital System Design Architectures, Methods and Tools, 2008. DSD '08. 11th EUROMICRO Conference on , vol., no., pp.81-87, 3-5 Sept. 2008// | * //__Citation__: Straka, M.; Kotasek, Z.; Winter, J.; , "Digital Systems Architectures Based on On-line Checkers," Digital System Design Architectures, Methods and Tools, 2008. DSD '08. 11th EUROMICRO Conference on , vol., no., pp.81-87, 3-5 Sept. 2008// | ||
* //__Citation__: Straka, M.; Kotasek, Z.; , "High Availability Fault Tolerant Architectures Implemented into FPGAs," Digital System Design, Architectures, Methods and Tools, 2009. DSD '09. 12th Euromicro Conference on , vol., no., pp.108-115, 27-29 Aug. 2009// | * //__Citation__: Straka, M.; Kotasek, Z.; , "High Availability Fault Tolerant Architectures Implemented into FPGAs," Digital System Design, Architectures, Methods and Tools, 2009. DSD '09. 12th Euromicro Conference on , vol., no., pp.108-115, 27-29 Aug. 2009// | ||
+ | * //__Citation__: Straka, M.; Tobola, J.; Kotasek, Z.; , "Checker Design for On-line Testing of Xilinx FPGA Communication Protocols," Defect and Fault-Tolerance in VLSI Systems, 2007. DFT '07. 22nd IEEE International Symposium on , vol., no., pp.152-160, 26-28 Sept. 2007// | ||
* **Dependable Design for FPGA based on Duplex System and Reconfiguration** (Stať ve sborníku) 2006, KUBALÍK P., DOBIÁŠ R., KUBÁTOVÁ H. In Proceedings of 9th Euromicro Conference on Digital System Design, DSD2006. Los Alamitos: IEEE Computer Society, 2006, p. 139-145. ISBN 0-7695-2609-8. {{:publication:dsd2006.pdf|pdf}} | * **Dependable Design for FPGA based on Duplex System and Reconfiguration** (Stať ve sborníku) 2006, KUBALÍK P., DOBIÁŠ R., KUBÁTOVÁ H. In Proceedings of 9th Euromicro Conference on Digital System Design, DSD2006. Los Alamitos: IEEE Computer Society, 2006, p. 139-145. ISBN 0-7695-2609-8. {{:publication:dsd2006.pdf|pdf}} |