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==== 2010 ==== | ==== 2010 ==== | ||
- | * **Faults Coverage Improvement based on Fault Simulation and Partial Duplication**, Proceedings of the 13th Euromicro Conference on Digital System Design, Lille, 2010, pp.(380-386) | + | * **Faults Coverage Improvement based on Fault Simulation and Partial Duplication**, Borecký,J., Kohlík,M., Kubátová,H., Kubalík, P., Proceedings of the 13th Euromicro Conference on Digital System Design, Lille, 2010, pp.(380-386) |
==== 2009 ==== | ==== 2009 ==== | ||
- | * **Reliable Railway Station System based on Regular Structure implemented in FPGA**, Proc. of 12th EUROMICRO Conference on Digital System Design, Patras, 2009, pp.(348-354). {{:publication:dsd2009.pdf|pdf}} | + | * **Reliable Railway Station System based on Regular Structure implemented in FPGA**, Borecký,J., Kubalík,P., Kubátová,H, Proc. of 12th EUROMICRO Conference on Digital System Design, Patras, 2009, pp.(348-354). {{:publication:dsd2009.pdf|pdf}} |
==== 2008 ==== | ==== 2008 ==== | ||
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* **Experimental SEU Impact on Digital Design Implemented in FPGAs** (Stať ve sborníku) 2008, KVASNIČKA J., KUBALÍK P., KUBÁTOVÁ H. In Proceedings of 11th Euromicro Conference on Digital System Design. Los Alamitos: IEEE Computer Society, 2008, p. 100-103. ISBN 978-0-7695-3277-6. {{:publication:dsd2008_kvasnicka.pdf|pdf}} | * **Experimental SEU Impact on Digital Design Implemented in FPGAs** (Stať ve sborníku) 2008, KVASNIČKA J., KUBALÍK P., KUBÁTOVÁ H. In Proceedings of 11th Euromicro Conference on Digital System Design. Los Alamitos: IEEE Computer Society, 2008, p. 100-103. ISBN 978-0-7695-3277-6. {{:publication:dsd2008_kvasnicka.pdf|pdf}} | ||
* **Experimental emulation of FPGA bitstream faults in combinatorial circuits** (Stať v elektronickém sborníku) 2008, KVASNIČKA J., KUBALÍK P., KUBÁTOVÁ H. In Proceedings of CSE 2008 International Scientific Conference on Computer Science and Engineering [CD-ROM]. Košice: Department of Computers and Informatics of FEI, Technical University Košice, 2008, vol. 1, p. 328-335. ISBN 978-80-8086-092-9. {{:publication:cse2008.pdf|pdf}} | * **Experimental emulation of FPGA bitstream faults in combinatorial circuits** (Stať v elektronickém sborníku) 2008, KVASNIČKA J., KUBALÍK P., KUBÁTOVÁ H. In Proceedings of CSE 2008 International Scientific Conference on Computer Science and Engineering [CD-ROM]. Košice: Department of Computers and Informatics of FEI, Technical University Košice, 2008, vol. 1, p. 328-335. ISBN 978-80-8086-092-9. {{:publication:cse2008.pdf|pdf}} | ||
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==== 2007 ==== | ==== 2007 ==== | ||
* **Fault Injection and Simulation for Fault Tolerant Reconfigurable Duplex System** (Stať ve sborníku) 2007, KUBALÍK P., KVASNIČKA J., KUBÁTOVÁ H. In Design and Diagnostics of Electronic Circuits and Systems. Los Alamitos: IEEE Computer Society, 2007, p. 357-360. ISBN 1-4244-1161-0. {{:publication:ddecs2007.pdf|pdf}} | * **Fault Injection and Simulation for Fault Tolerant Reconfigurable Duplex System** (Stať ve sborníku) 2007, KUBALÍK P., KVASNIČKA J., KUBÁTOVÁ H. In Design and Diagnostics of Electronic Circuits and Systems. Los Alamitos: IEEE Computer Society, 2007, p. 357-360. ISBN 1-4244-1161-0. {{:publication:ddecs2007.pdf|pdf}} | ||
- | * **An FPGA based fault emulator** (Stať ve sborníku) 2007, KVASNIČKA J., KUBALÍK P., KUBÁTOVÁ H. In Proceedings of the Work in Progress Session held in connection with the EUROMICRO Conferences SEAA and DSD 2007. Linz: Johannes Kepler University, 2007, p. 42-43. ISBN 978-3-902457-16-5. | + | * **An FPGA based fault emulator** (Stať ve sborníku) 2007, KVASNIČKA J., KUBALÍK P., KUBÁTOVÁ H. In Proceedings of the Work in Progress Session held in connection with the EUROMICRO Conferences SEAA and DSD 2007. Linz: Johannes Kepler University, 2007, p. 42-43. ISBN 978-3-902457-16-5. {{:publication:dsd2007.pdf|pdf}} |
* **Design of Self Checking Circuits Based on FPGAs** (Dissertation thesis (Ph.D.)) 2007, KUBALÍK P. [PhD Thesis]. Prague: CTU, Faculty of Electrical Engineering, Department of Computer Science and Engineering, 2007. 71 p. {{:publication:disert2007.pdf|pdf}} | * **Design of Self Checking Circuits Based on FPGAs** (Dissertation thesis (Ph.D.)) 2007, KUBALÍK P. [PhD Thesis]. Prague: CTU, Faculty of Electrical Engineering, Department of Computer Science and Engineering, 2007. 71 p. {{:publication:disert2007.pdf|pdf}} | ||
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* **Fault Tolerant System Design Method Based on Self-Checking Circuits** (Stať ve sborníku) 2006, KUBALÍK P., FIŠER P., KUBÁTOVÁ H. In Proceedings IOLTS 2006 12th IEEE International On-Line Testing Symposium. Los Alamitos: IEEE Computer Society, 2006, p. 185-186. ISBN 0-7695-2620-9. {{:publication:iolts2006.pdf|pdf}} | * **Fault Tolerant System Design Method Based on Self-Checking Circuits** (Stať ve sborníku) 2006, KUBALÍK P., FIŠER P., KUBÁTOVÁ H. In Proceedings IOLTS 2006 12th IEEE International On-Line Testing Symposium. Los Alamitos: IEEE Computer Society, 2006, p. 185-186. ISBN 0-7695-2620-9. {{:publication:iolts2006.pdf|pdf}} | ||
+ | * //Citation 1:// Ambegoda, A.L.A.T.D.; De Silva, W.T.S.; Hemachandra, K.T.; Samarasinghe, T.N.; Samarasinghe, A.T.L.K.; , "Centralized Traffic Controlling System for Sri Lanka Railways," Information and Automation for Sustainability, 2008. ICIAFS 2008. 4th International Conference on , vol., no., pp.145-149, 12-14 Dec. 2008 | ||
* **Dependable Design for FPGA based on Duplex System and Reconfiguration** (Stať ve sborníku) 2006, KUBALÍK P., DOBIÁŠ R., KUBÁTOVÁ H. In Proceedings of 9th Euromicro Conference on Digital System Design. Los Alamitos: IEEE Computer Society, 2006, p. 139-145. ISBN 0-7695-2609-8. {{:publication:dsd2006.pdf|pdf}} | * **Dependable Design for FPGA based on Duplex System and Reconfiguration** (Stať ve sborníku) 2006, KUBALÍK P., DOBIÁŠ R., KUBÁTOVÁ H. In Proceedings of 9th Euromicro Conference on Digital System Design. Los Alamitos: IEEE Computer Society, 2006, p. 139-145. ISBN 0-7695-2609-8. {{:publication:dsd2006.pdf|pdf}} | ||
* **Dependability Computation for Fault Tolerant Reconfigurable Duplex System** (Stať ve sborníku) 2006, KUBALÍK P., DOBIÁŠ R., KUBÁTOVÁ H. In Proceedings of the 2006 IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems. Praha: CTU Publishing House, 2006, vol. 1, p. 100-102. ISBN 1-4244-0184-4. {{:publication:ddecs2006.pdf|pdf}} | * **Dependability Computation for Fault Tolerant Reconfigurable Duplex System** (Stať ve sborníku) 2006, KUBALÍK P., DOBIÁŠ R., KUBÁTOVÁ H. In Proceedings of the 2006 IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems. Praha: CTU Publishing House, 2006, vol. 1, p. 100-102. ISBN 1-4244-0184-4. {{:publication:ddecs2006.pdf|pdf}} | ||
+ | * //Citation 1:// Mi Zhou, Lihong Shang, and Yu Hu. 2009. Reliability Optimization of Reconfigurable FPGA Based on Second-Order Approximation Domain-Partition. In Proceedings of the 2009 International Conference on Embedded Software and Systems (ICESS '09). IEEE Computer Society, Washington, DC, USA, 511-516 | ||
* **Design Methodology for High Reliable System** (Stať ve sborníku) 2006, KUBALÍK P., KUBÁTOVÁ H. In Proceedings of the Seventh International Scientific Conference on Electronic Computers and Informatics ECI 2006. Košice: Technická univerzita v Košiciach, 2006, vol. 1, p. 274-279. ISBN 80-8073-598-0. {{:publication:eci2006.pdf|pdf}} | * **Design Methodology for High Reliable System** (Stať ve sborníku) 2006, KUBALÍK P., KUBÁTOVÁ H. In Proceedings of the Seventh International Scientific Conference on Electronic Computers and Informatics ECI 2006. Košice: Technická univerzita v Košiciach, 2006, vol. 1, p. 274-279. ISBN 80-8073-598-0. {{:publication:eci2006.pdf|pdf}} | ||
* **Output Grouping Method Based on a Similarity of Boolean Functions** (Stať ve sborníku) 2006, FIŠER P., KUBALÍK P., KUBÁTOVÁ H. In Proceedings of the 7th International Workshop on Boolean Problems. Freiberg: Technische Universität Bergakademie, 2006, p. 107-113. ISBN 3-86012-287-8. {{:publication:iwsbp06.pdf|pdf}} | * **Output Grouping Method Based on a Similarity of Boolean Functions** (Stať ve sborníku) 2006, FIŠER P., KUBALÍK P., KUBÁTOVÁ H. In Proceedings of the 7th International Workshop on Boolean Problems. Freiberg: Technische Universität Bergakademie, 2006, p. 107-113. ISBN 3-86012-287-8. {{:publication:iwsbp06.pdf|pdf}} | ||
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* **FPGA Implementation of USB 1.1 Device Core** (Paper in Electronic Proceedings (CD-ROM or web)) 2003, KUBALÍK P., BUČEK J. In Proceedings of Workshop 2003 (online) [CD-ROM]. Prague: CTU, 2003, vol. A, p. 304-305. ISBN 80-01-02708-2. | * **FPGA Implementation of USB 1.1 Device Core** (Paper in Electronic Proceedings (CD-ROM or web)) 2003, KUBALÍK P., BUČEK J. In Proceedings of Workshop 2003 (online) [CD-ROM]. Prague: CTU, 2003, vol. A, p. 304-305. ISBN 80-01-02708-2. | ||
* **Design of Self Checking Circuits Based on FPGA** (Paper in Conference Proceedings) 2003, KUBALÍK P., KUBÁTOVÁ H. In Proceedings of the 15th International Conference on Microelectronics. Cairo: Cairo University, 2003, p. 378-381. ISBN 977-05-2010-1. {{:publication:icm2003.pdf|pdf}} | * **Design of Self Checking Circuits Based on FPGA** (Paper in Conference Proceedings) 2003, KUBALÍK P., KUBÁTOVÁ H. In Proceedings of the 15th International Conference on Microelectronics. Cairo: Cairo University, 2003, p. 378-381. ISBN 977-05-2010-1. {{:publication:icm2003.pdf|pdf}} | ||
+ | * //Citations//: Cristiana Bolchini and Antonio Miele. 2008. Design Space Exploration for the Design of Reliable SRAM-Based FPGA Systems. In Proceedings of the 2008 IEEE International Symposium on Defect and Fault Tolerance of VLSI Systems (DFT '08). IEEE Computer Society, Washington, DC, USA, 332-340. | ||
+ | ===== Main page ===== | ||
+ | |||
+ | * [[:start|Pavel Kubalík's Home Page]] | ||
+ |