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* **Reliable Railway Station System based on Regular Structure implemented in FPGA**, Proc. of 12th EUROMICRO Conference on Digital System Design, Patras, 2009, pp.(348-354) | * **Reliable Railway Station System based on Regular Structure implemented in FPGA**, Proc. of 12th EUROMICRO Conference on Digital System Design, Patras, 2009, pp.(348-354) | ||
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==== 2008 ==== | ==== 2008 ==== | ||
* **Dependable design technique for system-on-chip** (Článek) 2008, KUBALÍK P., KUBÁTOVÁ H. Journal of Systems Architecture. 2008, vol. 2008, no. 54, p. 452-464. ISSN 1383-7621. | * **Dependable design technique for system-on-chip** (Článek) 2008, KUBALÍK P., KUBÁTOVÁ H. Journal of Systems Architecture. 2008, vol. 2008, no. 54, p. 452-464. ISSN 1383-7621. | ||
- | * **An Efficient Multiple-Parity Generator Design for On-Line Testing on FPGA** (Stať ve sborníku) 2008, FIŠER P., KUBALÍK P., KUBÁTOVÁ H. In Proceedings of 11th Euromicro Conference on Digital System Design. Los Alamitos: IEEE Computer Society, 2008, p. 96-99. ISBN 978-0-7695-3277-6. | + | * **An Efficient Multiple-Parity Generator Design for On-Line Testing on FPGA** (Stať ve sborníku) 2008, FIŠER P., KUBALÍK P., KUBÁTOVÁ H. In Proceedings of 11th Euromicro Conference on Digital System Design. Los Alamitos: IEEE Computer Society, 2008, p. 96-99. ISBN 978-0-7695-3277-6. {{:publication:dsd2008_fiser.pdf|pdf}} |
- | * **Experimental SEU Impact on Digital Design Implemented in FPGAs** (Stať ve sborníku) 2008, KVASNIČKA J., KUBALÍK P., KUBÁTOVÁ H. In Proceedings of 11th Euromicro Conference on Digital System Design. Los Alamitos: IEEE Computer Society, 2008, p. 100-103. ISBN 978-0-7695-3277-6. | + | * **Experimental SEU Impact on Digital Design Implemented in FPGAs** (Stať ve sborníku) 2008, KVASNIČKA J., KUBALÍK P., KUBÁTOVÁ H. In Proceedings of 11th Euromicro Conference on Digital System Design. Los Alamitos: IEEE Computer Society, 2008, p. 100-103. ISBN 978-0-7695-3277-6. {{:publication:dsd2008_kvasnicka.pdf|pdf}} |
- | * **Experimental emulation of FPGA bitstream faults in combinatorial circuits** (Stať v elektronickém sborníku) 2008, KVASNIČKA J., KUBALÍK P., KUBÁTOVÁ H. In Proceedings of CSE 2008 International Scientific Conference on Computer Science and Engineering [CD-ROM]. Košice: Department of Computers and Informatics of FEI, Technical University Košice, 2008, vol. 1, p. 328-335. ISBN 978-80-8086-092-9 | + | * **Experimental emulation of FPGA bitstream faults in combinatorial circuits** (Stať v elektronickém sborníku) 2008, KVASNIČKA J., KUBALÍK P., KUBÁTOVÁ H. In Proceedings of CSE 2008 International Scientific Conference on Computer Science and Engineering [CD-ROM]. Košice: Department of Computers and Informatics of FEI, Technical University Košice, 2008, vol. 1, p. 328-335. ISBN 978-80-8086-092-9. {{:publication:cse2008.pdf|pdf}} |
==== 2007 ==== | ==== 2007 ==== | ||