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==== 2006 ==== | ==== 2006 ==== | ||
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==== 2005 ==== | ==== 2005 ==== | ||
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+ | * **Design of Self-Testing Circuits Using Parity Codes** (Paper in Electronic Proceedings (CD-ROM or web)) 2005, KUBALÍK P., KUBÁTOVÁ H. In Proceedings of Workshop 2005 [CD-ROM]. Prague: CTU, 2005, p. 214-215. ISBN 80-01-03201-9. (in Czech). | ||
+ | * **Reconfigurable Duplex System Increasing Fault Tolerance for Circuits Based on FPGAs** (Paper in Conference Proceedings) 2005, KUBALÍK P., KUBÁTOVÁ H. In Proceedings of the Work in Progress Session. Linz: Johannes Kepler University, 2005, p. 13-14. ISBN 3-902457-09-0. {{:publication:euromicro2005.pdf|pdf}} | ||
+ | * **Highly Reliable Design Based on TSC Circuits** (Paper in Conference Proceedings) 2005, KUBALÍK P., KUBÁTOVÁ H. In Počítačové architektury & diagnostika. Prague: CTU, Faculty of Electrical Engineering, Department of Computer Science and Engineering, 2005, vol. 1, p. 101-106. ISBN 80-01-03298-1. {{:publication:pad2005.pdf|pdf}} | ||
+ | * **Dependability Computations for Fault-Tolerant System Based on FPGA** (Paper in Conference Proceedings) 2005, DOBIÁŠ R., KUBALÍK P., KUBÁTOVÁ H. In Proceedings of the 12th International Conferrence on Electronics, Circuits and Systems. Monterey: IEEE Circuits and Systems Society, 2005, vol. 1, p. 377-380. ISBN 9973-61-100-4. {{:publication:icecs2005.pdf|pdf}} | ||
+ | * **Fault Classification for Self-checking Circuits Implemented in FPGA** (Paper in Conference Proceedings) 2005, KAFKA L., KUBALÍK P., KUBÁTOVÁ H., NOVÁK O. In Proceedings of IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop. Sopron: University of Western Hungary, 2005, p. 228-231. ISBN 963 9364 48 7. {{:publication:ddecs2005.pdf|pdf}} | ||
==== 2004 ==== | ==== 2004 ==== |