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Ing. Pavel Kubalík, Ph.D.

Assistant Professor (pavel.kubalik[at]

Department of Digital Design
Faculty of Information Technology
Czech Technical University in Prague
Thákurova 9
160 00 Prague 6
Czech Republic  
  • Phone: (+420 2) 2435 9841
  • Room: A-1037

University pages

Research Interests

  • Fault-tolerant design in FPGA
  • Digital design in FPGA
  • Self testing circuits based on FPGA
  • HW design of networks
  • High-speed wireless networks
  • FPGA design of a dedicated hardware solver of systems of linear equations (SLE) in residue number system (RNS)
  • Arithmetic in FPGA
  • Error Control Codes in FPGA
  • Signal processing algorithms implemented in FPGA used for GNSS

Teaching activities

  • BI-CAO Digital and Analog Circuits BI-CAO
  • BI-JPO Computer Units BI-JPO
  • BIE-JPO Computer Units BIE-JPO
  • BI-PSI Computer Networking BI-PSI
  • MIE-AAK Arithmetics and codes MIE-AAK


Other Informations

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start.txt · Last modified: 2020/12/13 17:18 by xkubalik