Pavel Kubalík's Home Page
Ing. Pavel Kubalík, Ph.D.
Assistant Professor (pavel.kubalik[at]fit.cvut.cz)
Department of Digital Design
Faculty of Information Technology
Czech Technical University in Prague
Thákurova 9
160 00 Prague 6
Czech Republic
University pages
Research Interests
Fault-tolerant design in FPGA
Digital design in FPGA
Self testing circuits based on FPGA
HW design of networks
High-speed wireless networks
FPGA design of a dedicated hardware solver of systems of linear equations (SLE) in residue number system (RNS)
Arithmetic in FPGA
Error Control Codes in FPGA
Signal processing algorithms implemented in FPGA used for GNSS
Teaching activities
BI-CAO Digital and Analog Circuits
BI-CAO
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BI-PSI Computer Networking
BI-PSI
MIE-AAK Arithmetics and codes
MIE-AAK
Publications
Software to download
Internal Links
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