head
of Digital Design and Dependability Research Group
Research interests
- Digital
design with respect to
fault-tolerance and dependability
- Dependability
modeling and realiability parameters
computations
- Petri Nets
in modeling, simulation and
hardware design
- Embedded systems
and FPGA implementation
- Logic synthesis
Publications
Teaching activities
PhD students
- Tomáš
Balihar
- Jan
Řezníček
- Karel
Hynek
- Tomáš
Beneš
- Jan
Luxemburk
Supervised PhD thesis, year of defence
- Reliability Analysis
of SRAM based FieldProgrammable Gate Arrays (J. Kvasnička 2014)
- Extendable and Scalable FPGA based High-speed (J. Halák 2013)
- Methodology of Fail-Safe and Fault Tolerant System Design (R. Dobiáš 2010)
- Column-Matching
Based Mixed-Mode BIST Technique (P. Fišer 2007)
- Design
of Self Checking Circuits Based on FPGAs (P. Kubalík, 2007)
- Dependable Systems
Design Methods for FPGAs (J. Borecký, 2016)
- Hierarchical
Dependability Models Based on Markov Chains (M. Kohlík, 2016)
- Generation of
High-Speed Network Device from High-Level Description (P. Benáček, 2017)
- Physical
Fault Injection and Monitoringk Methods for Programmable Devices (T. Vaňát, 2017)
- Dependable
Design Methods for Programmable Circuits with respect to Area Overhead (P. Vít, 2017)
- Prediction
and Analysis of Mission Critical Systems Dependability (M. Daňhel, 2018)
- Dependable
Stream-wise Anomaly Detection in Computer Networks (T. Čejka, 2018)
- Side-Channel
Analysis: Efficient Attacks and Fault-Tolerant Countermeasures (V. Miškovský, 2020)
Memberships and
other activities
- Scientific Council
of CTU in Prague
- Scientific Council
of FIT CTU in Prague
- Scientific Council
of FIT Brno University of
Technology
- RVŠ
(University Board of Czech Republic)
- Editorial Board
of MICPRO Journal
- Member of
EUROMICRO Board of Directors
- Organizing annual
Ph.D. workshops PESW
- Program
commitee member: DSD Euromicro, DDECS, ReConFig, ISQED, MECO-ECYPS,
MEMICS, PAD, DESDES, etc.