.\" /*
.\"  * Revision Control Information
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.\"  * $Source: /vol/opua/opua2/sis/sis-1.1/common/src/sis/sis_lib/help/RCS/stg_cover.1,v $
.\"  * $Author: sis $
.\"  * $Revision: 1.2 $
.\"  * $Date: 1992/05/06 19:04:01 $
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.XX
stg_cover
.PP
Check to see that the behavior of the STG covers
that of the logic implementation.
This operation is provided for the user to check that
two descriptions of the same machine are consistent.
Each edge in the STG is symbolically simulated in the
logic implementation to ensure that the logic implementation
behaves as specified by the STG.
