Download
Logic Synthesis
- ESPRESSO v2.3 - Two-level Boolean minimizer from
Berkeley
- SIS 1.2 - logic synthesis package from Berkeley
- MVSIS 2.0 - multivalued logic synthesis package
from Berkeley
- BOOM - two-level Boolean minimizer
- BDD 2.4 - Binary Decision Diagram (BDD) Package
from Berkeley
- CUDD 2.4.0 - Binary Decision Diagram (BDD)
Package by Fabio Somenzi
- A Collection of Digital Design Benchmarks
Diagnostics
- Atalanta - ATPG tool
- Atalanta-M - Modified Atalanta. ATPG and fault
simulator
- FSIM - Fault simulator
- HOPE - Better fault simulator
- MILEF - ATPG tool
Other
- Logic Specification Formats Convertor 1.2 (Bench, Edif, Blif, Cir)
- Cygwin1.dll - CygWin library
- Borland C++ 5.6 Compiler for Win32