sis> UC Berkeley, SIS 1.3.6 (compiled 2007-07-18 12:59:37)
sis> <-- START --> 
sis> sis> <-- bbara --> 
sis> sis> jedi_output   	pi= 4	po= 2	nodes=  9	latches= 7
lits(sop)=  96	#states(STG)=   7
sis> Combinational power estimation, with Zero delay model.
Network: jedi_output, Power = 654.3 uW assuming 20 MHz clock and Vdd = 5V
sis> <-- END --> 
sis> <-- START --> 
sis> sis> <-- bbsse --> 
sis> sis> jedi_output   	pi= 7	po= 7	nodes= 20	latches=13
lits(sop)= 240	#states(STG)=  13
sis> Combinational power estimation, with Zero delay model.
Network: jedi_output, Power = 1336.1 uW assuming 20 MHz clock and Vdd = 5V
sis> <-- END --> 
sis> <-- START --> 
sis> sis> <-- bbtas --> 
sis> sis> jedi_output   	pi= 2	po= 2	nodes=  8	latches= 6
lits(sop)=  44	#states(STG)=   6
sis> Combinational power estimation, with Zero delay model.
Network: jedi_output, Power = 352.7 uW assuming 20 MHz clock and Vdd = 5V
sis> <-- END --> 
sis> <-- START --> 
sis> sis> <-- beecount --> 
sis> sis> jedi_output   	pi= 3	po= 4	nodes=  8	latches= 4
lits(sop)= 105	#states(STG)=   4
sis> Combinational power estimation, with Zero delay model.
Network: jedi_output, Power = 491.4 uW assuming 20 MHz clock and Vdd = 5V
sis> <-- END --> 
sis> <-- START --> 
sis> sis> <-- cse --> 
sis> sis> jedi_output   	pi= 7	po= 7	nodes= 23	latches=16
lits(sop)= 535	#states(STG)=  16
sis> Combinational power estimation, with Zero delay model.
Network: jedi_output, Power = 2616.6 uW assuming 20 MHz clock and Vdd = 5V
sis> <-- END --> 
sis> <-- START --> 
sis> sis> <-- dk14 --> 
sis> sis> jedi_output   	pi= 3	po= 5	nodes= 12	latches= 7
lits(sop)= 354	#states(STG)=   7
sis> Combinational power estimation, with Zero delay model.
Network: jedi_output, Power = 1227.6 uW assuming 20 MHz clock and Vdd = 5V
sis> <-- END --> 
sis> <-- START --> 
sis> sis> <-- dk15 --> 
sis> sis> jedi_output   	pi= 3	po= 5	nodes=  9	latches= 4
lits(sop)= 185	#states(STG)=   4
sis> Combinational power estimation, with Zero delay model.
Network: jedi_output, Power = 832.3 uW assuming 20 MHz clock and Vdd = 5V
sis> <-- END --> 
sis> <-- START --> 
sis> sis> <-- dk16 --> 
sis> sis> jedi_output   	pi= 2	po= 3	nodes= 30	latches=27
lits(sop)= 919	#states(STG)=  27
sis> Combinational power estimation, with Zero delay model.
Network: jedi_output, Power = 4613.7 uW assuming 20 MHz clock and Vdd = 5V
sis> <-- END --> 
sis> <-- START --> 
sis> sis> <-- dk17 --> 
sis> sis> jedi_output   	pi= 2	po= 3	nodes= 11	latches= 8
lits(sop)= 175	#states(STG)=   8
sis> Combinational power estimation, with Zero delay model.
Network: jedi_output, Power = 788.3 uW assuming 20 MHz clock and Vdd = 5V
sis> <-- END --> 
sis> <-- START --> 
sis> sis> <-- dk27 --> 
sis> sis> jedi_output   	pi= 1	po= 2	nodes=  9	latches= 7
lits(sop)=  45	#states(STG)=   7
sis> Combinational power estimation, with Zero delay model.
Network: jedi_output, Power = 364.1 uW assuming 20 MHz clock and Vdd = 5V
sis> <-- END --> 
sis> <-- START --> 
sis> sis> <-- ex1 --> 
sis> sis> jedi_output   	pi= 9	po=19	nodes= 37	latches=18
lits(sop)= 967	#states(STG)=  18
sis> Combinational power estimation, with Zero delay model.
Network: jedi_output, Power = 3519.9 uW assuming 20 MHz clock and Vdd = 5V
sis> <-- END --> 
sis> <-- START --> 
sis> sis> <-- ex3 --> 
sis> sis> jedi_output   	pi= 2	po= 2	nodes=  7	latches= 5
lits(sop)=  43	#states(STG)=   5
sis> Combinational power estimation, with Zero delay model.
Network: jedi_output, Power = 355.8 uW assuming 20 MHz clock and Vdd = 5V
sis> <-- END --> 
sis> <-- START --> 
sis> sis> <-- ex4 --> 
sis> sis> jedi_output   	pi= 6	po= 9	nodes= 23	latches=14
lits(sop)=  83	#states(STG)=  14
sis> Combinational power estimation, with Zero delay model.
Network: jedi_output, Power = 719.1 uW assuming 20 MHz clock and Vdd = 5V
sis> <-- END --> 
sis> <-- START --> 
sis> sis> <-- ex5 --> 
sis> sis> jedi_output   	pi= 2	po= 2	nodes=  6	latches= 4
lits(sop)=  37	#states(STG)=   4
sis> Combinational power estimation, with Zero delay model.
Network: jedi_output, Power = 272.3 uW assuming 20 MHz clock and Vdd = 5V
sis> <-- END --> 
sis> <-- START --> 
sis> sis> <-- ex6 --> 
sis> sis> jedi_output   	pi= 5	po= 8	nodes= 16	latches= 8
lits(sop)= 346	#states(STG)=   8
sis> Combinational power estimation, with Zero delay model.
Network: jedi_output, Power = 1525.5 uW assuming 20 MHz clock and Vdd = 5V
sis> <-- END --> 
sis> <-- START --> 
sis> sis> <-- ex7 --> 
sis> sis> jedi_output   	pi= 2	po= 2	nodes=  6	latches= 4
lits(sop)=  48	#states(STG)=   4
sis> Combinational power estimation, with Zero delay model.
Network: jedi_output, Power = 339.5 uW assuming 20 MHz clock and Vdd = 5V
sis> <-- END --> 
sis> <-- START --> 
sis> sis> <-- keyb --> 
sis> sis> jedi_output   	pi= 7	po= 2	nodes= 21	latches=19
lits(sop)= 752	#states(STG)=  19
sis> Combinational power estimation, with Zero delay model.
Network: jedi_output, Power = 2990.2 uW assuming 20 MHz clock and Vdd = 5V
sis> <-- END --> 
sis> <-- START --> 
sis> sis> <-- lion9 --> 
sis> sis> jedi_output   	pi= 2	po= 1	nodes=  5	latches= 4
lits(sop)=  22	#states(STG)=   4
sis> Combinational power estimation, with Zero delay model.
Network: jedi_output, Power = 214.8 uW assuming 20 MHz clock and Vdd = 5V
sis> <-- END --> 
sis> <-- START --> 
sis> sis> <-- lion --> 
sis> sis> jedi_output   	pi= 2	po= 1	nodes=  5	latches= 4
lits(sop)=  44	#states(STG)=   4
sis> Combinational power estimation, with Zero delay model.
Network: jedi_output, Power = 305.9 uW assuming 20 MHz clock and Vdd = 5V
sis> <-- END --> 
sis> <-- START --> 
sis> sis> <-- mark1 --> 
sis> sis> jedi_output   	pi= 5	po=16	nodes= 28	latches=12
lits(sop)= 250	#states(STG)=  12
sis> Combinational power estimation, with Zero delay model.
Network: jedi_output, Power = 1313.8 uW assuming 20 MHz clock and Vdd = 5V
sis> <-- END --> 
sis> <-- START --> 
sis> sis> <-- mc --> 
sis> sis> jedi_output   	pi= 3	po= 5	nodes=  9	latches= 4
lits(sop)=  63	#states(STG)=   4
sis> Combinational power estimation, with Zero delay model.
Network: jedi_output, Power = 383.0 uW assuming 20 MHz clock and Vdd = 5V
sis> <-- END --> 
sis> <-- START --> 
sis> sis> <-- opus --> 
sis> sis> jedi_output   	pi= 5	po= 6	nodes= 15	latches= 9
lits(sop)= 197	#states(STG)=   9
sis> Combinational power estimation, with Zero delay model.
Network: jedi_output, Power = 977.6 uW assuming 20 MHz clock and Vdd = 5V
sis> <-- END --> 
sis> <-- START --> 
sis> sis> <-- s1 --> 
sis> sis> jedi_output   	pi= 8	po= 6	nodes= 26	latches=20
lits(sop)=1668	#states(STG)=  20
sis> Combinational power estimation, with Zero delay model.
Network: jedi_output, Power = 5317.0 uW assuming 20 MHz clock and Vdd = 5V
sis> <-- END --> 
sis> <-- START --> 
sis> sis> <-- s208 --> 
sis> sis> jedi_output   	pi=11	po= 2	nodes= 20	latches=18
lits(sop)= 152	#states(STG)=  18
sis> Combinational power estimation, with Zero delay model.
Network: jedi_output, Power = 1124.1 uW assuming 20 MHz clock and Vdd = 5V
sis> <-- END --> 
sis> <-- START --> 
sis> sis> <-- s27 --> 
sis> sis> jedi_output   	pi= 4	po= 1	nodes=  6	latches= 5
lits(sop)= 110	#states(STG)=   5
sis> Combinational power estimation, with Zero delay model.
Network: jedi_output, Power = 543.7 uW assuming 20 MHz clock and Vdd = 5V
sis> <-- END --> 
sis> <-- START --> 
sis> sis> <-- s386 --> 
sis> sis> jedi_output   	pi= 7	po= 7	nodes= 20	latches=13
lits(sop)= 243	#states(STG)=  13
sis> Combinational power estimation, with Zero delay model.
Network: jedi_output, Power = 1344.5 uW assuming 20 MHz clock and Vdd = 5V
sis> <-- END --> 
sis> <-- START --> 
sis> sis> <-- s420 --> 
sis> sis> jedi_output   	pi=19	po= 2	nodes= 20	latches=18
lits(sop)= 152	#states(STG)=  18
sis> Combinational power estimation, with Zero delay model.
Network: jedi_output, Power = 1124.1 uW assuming 20 MHz clock and Vdd = 5V
sis> <-- END --> 
sis> <-- START --> 
sis> sis> <-- s820 --> 
sis> sis> jedi_output   	pi=18	po=19	nodes= 43	latches=24
lits(sop)= 618	#states(STG)=  24
sis> Combinational power estimation, with Zero delay model.
Network: jedi_output, Power = 2969.4 uW assuming 20 MHz clock and Vdd = 5V
sis> <-- END --> 
sis> <-- START --> 
sis> sis> <-- s832 --> 
sis> sis> jedi_output   	pi=18	po=19	nodes= 43	latches=24
lits(sop)= 638	#states(STG)=  24
sis> Combinational power estimation, with Zero delay model.
Network: jedi_output, Power = 3073.0 uW assuming 20 MHz clock and Vdd = 5V
sis> <-- END --> 
sis> <-- START --> 
sis> sis> <-- sand --> 
sis> sis> jedi_output   	pi=11	po= 9	nodes= 41	latches=32
lits(sop)=1822	#states(STG)=  32
sis> Combinational power estimation, with Zero delay model.
Network: jedi_output, Power = 7265.9 uW assuming 20 MHz clock and Vdd = 5V
sis> <-- END --> 
sis> <-- START --> 
sis> sis> <-- shiftreg --> 
sis> sis> jedi_output   	pi= 1	po= 1	nodes=  9	latches= 8
lits(sop)=  60	#states(STG)=   8
sis> Combinational power estimation, with Zero delay model.
Network: jedi_output, Power = 502.8 uW assuming 20 MHz clock and Vdd = 5V
sis> <-- END --> 
sis> <-- START --> 
sis> sis> <-- sse --> 
sis> sis> jedi_output   	pi= 7	po= 7	nodes= 20	latches=13
lits(sop)= 240	#states(STG)=  13
sis> Combinational power estimation, with Zero delay model.
Network: jedi_output, Power = 1336.1 uW assuming 20 MHz clock and Vdd = 5V
sis> <-- END --> 
sis> <-- START --> 
sis> sis> <-- styr --> 
sis> sis> jedi_output   	pi= 9	po=10	nodes= 40	latches=30
lits(sop)=2196	#states(STG)=  30
sis> Combinational power estimation, with Zero delay model.
Network: jedi_output, Power = 8254.0 uW assuming 20 MHz clock and Vdd = 5V
sis> <-- END --> 
sis> <-- START --> 
sis> sis> <-- tav --> 
sis> sis> jedi_output   	pi= 4	po= 4	nodes=  8	latches= 4
lits(sop)=  30	#states(STG)=   4
sis> Combinational power estimation, with Zero delay model.
Network: jedi_output, Power = 231.7 uW assuming 20 MHz clock and Vdd = 5V
sis> <-- END --> 
sis> <-- START --> 
sis> sis> <-- tbk --> 
sis> sis> jedi_output   	pi= 6	po= 3	nodes= 19	latches=16
lits(sop)= 783	#states(STG)=  16
sis> Combinational power estimation, with Zero delay model.
Network: jedi_output, Power = 3385.9 uW assuming 20 MHz clock and Vdd = 5V
sis> <-- END --> 
sis> <-- START --> 
sis> sis> <-- train4 --> 
sis> sis> jedi_output   	pi= 2	po= 1	nodes=  5	latches= 4
lits(sop)=  48	#states(STG)=   4
sis> Combinational power estimation, with Zero delay model.
Network: jedi_output, Power = 305.6 uW assuming 20 MHz clock and Vdd = 5V
sis> <-- END --> 
