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<h1> Areas of interest</h1>
<ul class="sez">
  <li class="liche"> Physical design algorithms for field-programmable gate arrays (FPGAs).</li>
  <li class="sude"> Petri nets and their hardware implementation.</li>
  <li class="liche"> Optimal FSM implementation in FPGAs.</li>
  <li class="sude"> Minimization of Boolean functions.</li>
  <li class="liche"> Decomposition of combinational circuits</li>
  <li class="sude"> Generation of benchmarks for physical design algorithms.</li>
  <li class="liche"> Reliability and diagnostics of electronic circuits, design of FPGA architectures with respect to self-diagnostics.</li>
  <li class="sude"> Design of off-line and on-line BIST</li>
  <li class="liche"> Precision and modular arithmetics, FPGA implementations of arithmetic units.</li>
  <li class="sude"> Reconfigurable computing, FPGA-based accelerators.</li>
  <li class="liche"> Acceleration of ECDSA-based cryptography algorithms.</li>
  <li class="sude"> Self-adapting systems based on evolutionary algorithms.</li>
</ul>

<br />
<div class="odkazy">
	<a href="http://service.felk.cvut.cz/vlsi/video/vlsi.avi" target="_blank">Video presentation of VLSI research group (in Czech)</a><br />
	<a href="http://service.felk.cvut.cz/vlsi/poster.pdf" target="_blank">VLSI research group poster</a><br />
</div>
	
<h1>Contact info</h1>
<div class="odkazy">
	<a target="_blank" href="http://cs.felk.cvut.cz">Department of Computer Science and Engineering</a><br />
	<a target="_blank" href="http://www.feld.cvut.cz">Faculty of Electrical Engineering</a><br />
    <a target="_blank" href="http://www.cvut.cz">Czech Technical University in Prague</a><br />
    <br />
	Karlovo nám. 13 <br />
	Praha 2 <br />
	CZ-121 35 <br />
	Czech Republic<br />
	Phone: +420 2 2435 7470<br />
  	Fax: +420 2 2492 3325<br />
  	
</div>
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