
+unit
    +library bench_primitives
	+entity and3
	    =port I1 attr in 
	    =port I2 attr in 
	    =port I3 attr in 
	    =port O attr out 
	    +arch bench attr behav 
		symmetric func AND, 3 inputs
	    -arch bench
	-entity and3
	+entity dff1
	    =port D attr in 
	    =port O attr out 
	    =port Q attr out 
	    +arch bench attr behav 
		RTL register
	    -arch bench
	-entity dff1
	+entity nand2
	    =port I1 attr in 
	    =port I2 attr in 
	    =port O attr out 
	    +arch bench attr behav 
		symmetric func NAND, 2 inputs
	    -arch bench
	-entity nand2
	+entity nor2
	    =port I1 attr in 
	    =port I2 attr in 
	    =port O attr out 
	    +arch bench attr behav 
		symmetric func NOR, 2 inputs
	    -arch bench
	-entity nor2
	+entity not1
	    =port I1 attr in 
	    =port O attr out 
	    +arch bench attr behav 
		symmetric func INV, 1 inputs
	    -arch bench
	-entity not1
	+entity or2
	    =port I1 attr in 
	    =port I2 attr in 
	    =port O attr out 
	    +arch bench attr behav 
		symmetric func OR, 2 inputs
	    -arch bench
	-entity or2
	+entity or3
	    =port I1 attr in 
	    =port I2 attr in 
	    =port I3 attr in 
	    =port O attr out 
	    +arch bench attr behav 
		symmetric func OR, 3 inputs
	    -arch bench
	-entity or3
    -library bench_primitives
    +library work
	+entity s27
	    =port G0 attr in 
	    =port G1 attr in 
	    =port G17 attr out 
	    =port G2 attr in 
	    =port G3 attr in 
	    +arch bench attr struct 
		=instance G10 nor2.bench_primitives
		=instance G11 nor2.bench_primitives
		=instance G12 nor2.bench_primitives
		=instance G13 nor2.bench_primitives
		=instance G14 not1.bench_primitives
		=instance G15 or3.bench_primitives
		=instance G16 or2.bench_primitives
		=instance G17 not1.bench_primitives
		=instance G5 dff1.bench_primitives
		=instance G6 dff1.bench_primitives
		=instance G7 dff1.bench_primitives
		=instance G8 and3.bench_primitives
		=instance G9 nand2.bench_primitives
		+net G0 G0, I1.G14, I3.G15
		-net G0
		+net G1 G1, I1.G12
		-net G1
		+net G10 D.G5, O.G10
		-net G10
		+net G11 D.G6, I1.G17, I2.G10, O.G11
		-net G11
		+net G12 I1.G15, O.G12, I2.G13
		-net G12
		+net G13 D.G7, O.G13
		-net G13
		+net G14 O.G14, I1.G8, I1.G10
		-net G14
		+net G15 O.G15, I2.G9
		-net G15
		+net G16 O.G16, I1.G9
		-net G16
		+net G17 G17, O.G17
		-net G17
		+net G2 G2, I1.G13
		-net G2
		+net G3 G3, I1.G16
		-net G3
		+net G5 O.G5, I1.G11
		-net G5
		+net G6 O.G6, I2.G8
		-net G6
		+net G7 O.G7, I3.G8, I2.G12
		-net G7
		+net G8 O.G8, I2.G15, I2.G16
		-net G8
		+net G9 O.G9, I2.G11
		-net G9
	    -arch bench
	-entity s27
    -library work
-unit